Issue 2/2005
Content (19 Articles)
Fault Diagnosis of Physical Defects Using Unknown Behavior Model
Xiao-Qing Wen, Hideo Tamamoto, Kewal K. Saluja, Kozo Kinoshita
Delay Testing Viability of Gate Oxide Short Defects
J. M. Gallière, M. Renovell, F. Azaïs, Y. Bertrand
Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Tester Channels Reduction
Yin-He Han, Xiao-Wei Li, Hua-Wei Li, Anshuman Chandra
On Test Data Compression Using Selective Don’t-Care Identification
Terumine Hayashi, Haruna Yoshioka, Tsuyoshi Shinogi, Hidehiko Kita, Haruhiko Takase
A Wiring-Aware Approach to Minimizing Built-In Self-Test Overhead
Abdil Rashid Mohamed, Zebo Peng, Petru Eles
Modeling and Analysis of Mesh Tree Hybrid Power/Ground Networks with Multiple Voltage Supply in Time Domain
Yi-Ci Cai, Jin Shi, Zu-Ying Luo, Xian-Long Hong
A Novel Multiple-Valued CMOS Flip-Flop Employing Multiple-Valued Clock
Yin-Shui Xia, Lun-Yao Wang, A. E. A. Almaini
Analysis of Software Test Item Generation—— Comparison Between High Skilled and Low Skilled Engineers
Masayuki Hirayama, Osamu Mizuno, Tohru Kikuno
RWBO(p d w): A Novel Backoff Algorithm for IEEE 802.11 DCF
Yun Li, Ke-Ping Long, Wei-Liang Zhao, Feng-Rui Yang
RSAD: A Robust Distributed Contention-Based Adaptive Mechanism for IEEE 802.11 Wireless LANs
Yong Peng, Shi-Duan Cheng, Jun-Liang Chen