A 0.533 dB Noise Figure and 7 mW Narrowband Low Noise Amplifier for GPS Application

In this research article, low noise amplifier (LNA) circuit is proposed. This circuit is most important block of receiver system. In wireless communication system, LNA is used in receiver front-end circuitry. It should be necessarily having high gain and minimum noise figure for optimum performance. This work is an attempt to develop the same without disturbing stability and linearity in the circuit. The proposed low noise figure LNA contains single-ended cascode topology including the input matching network and output matching network at input and output sides, respectively, so that minimum components are required when the circuit follows for LNA IC fabrication. The CMOS low noise amplifier is designed through Cadence spectre RF simulation in standard UMC 90 nm CMOS process. It is designed for 1.575 GHz frequency which seeks its application in GPS receiver. The parameters like gain, input matching, output matching, reverse isolation and stability are examined by S-parameters. The noise figure, 1-dB compression point IIP3 and power consumption are also examined for 1.5 V input LNA. The proposed LNA is compared with existing LNA for performance analysis using the above parameters.