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2012 | OriginalPaper | Buchkapitel

6. A Flexible Parallel Simulator for Networks-on-Chip with Error Control

verfasst von : Qiaoyan Yu, Paul Ampadu

Erschienen in: Transient and Permanent Error Control for Networks-on-Chip

Verlag: Springer New York

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Abstract

To fill in the gap between NoC simulator implementation and NoC error control exploration, we develop an NoC simulator that facilitates comprehensively investigation of the impact of different error control methods on NoC performance and energy consumption. The main functionality of the proposed simulator, plug-and-play error control coding (ECC) insertion and the flexible fault injection environment are introduced in this chapter. Energy estimation and improvements on simulation speed and memory consumption are analyzed, as well.

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Metadaten
Titel
A Flexible Parallel Simulator for Networks-on-Chip with Error Control
verfasst von
Qiaoyan Yu
Paul Ampadu
Copyright-Jahr
2012
Verlag
Springer New York
DOI
https://doi.org/10.1007/978-1-4614-0962-5_6

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