A high performance gate engineered charge plasma based tunnel field effect transistor

In this paper, we propose a new gate engineered dopingless tunnel field effect transistor (GEDL-TFET). GEDL-TFET has double gate and uses metals of different work functions to realize source and drain regions in undoped silicon; a charge plasma concept. The novelty of the device is the use of dual material top gate and thus two gates appear at the top, main gate 1 and a tunneling gate (TG). The use of TG has enhanced the performance of the device significantly and it acts as a performance booster. The simulation study has shown that the \(\hbox {I}_{\mathrm{ON}}\) and \(\hbox {I}_{\mathrm{ON}}/\hbox {I}_{\mathrm{OFF}}\) ratio in the proposed GEDL-TFET device have increased by \(\sim \)53 times and \(\sim \)68 times in comparison to a double gate doped TFET (D-TFET) and a double gate dopingless TFET (DL-TFET) devices respectively. Further, a significant improvement in average subthreshold slope of \(\sim \)57% has been achieved in the proposed GEDL-TFET device in comparison to the other two devices. Besides, the cutoff frequency \((f_{\mathrm{T}})\) of GEDL-TFET (90.77 GHZ) has increased by \(\sim \)12 times in comparison to D-FET (\(\sim \)7.77 GHZ) and DL-TFET (\(\sim \)7.77 GHZ) devices respectively. The transient analyses have shown that a reduction of 47 and 44.11 % in switching ON-delay and 21.1 and 16.23 % in switching OFF delay is obtained in the GEDL-TFET device based inverting amplifier in comparison to DL-TFET and D-TFET based inverters amplifiers respectively.