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Responsible Editors: G. Léger and C. Wegener
An instrument for on-chip measurement of transceiver transmission capability is described that is fully realizable in CMOS technology and embeddable within an SoC. The instrument can be used to inject and extract the timing and voltage information associated with signals in high-speed transceiver circuits that are commonly found in data communication applications. At the core of this work is the use of ΣΔ amplitude- and phase-encoding techniques to generate both the voltage and timing (phase) references, or strobes used for high-speed sampling. The same technique is also used for generating the test stimulant for the device-under-test.
Ameri, A and Roberts, G. W (2011) “Time-mode reconstruction IIR filters for ΣΔ phase modulation applications,” Proceedings of the 21st IEEE/ACM Great Lakes Symposium on VLSI, Lausanne, Switzerland, May 2-4
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Bielby, S and Roberts, G. W (2014) “Sub-gate-delay edge-control of a clock signal using DLLs and Sigma-Delta modulation techniques, (2014)” Proc. circuits, devices and systems symposium of the IEEE Canadian conference on electrical and computer engineering, Toronto, Ont., May
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Li, Y Bielby, S Chowdhury, A and Roberts, G. W (2015) “Edge placement signal generation techniques for time-based signaling,” Proceedings of the IEEE International Mixed-Signal Test Workshop, Paris, France, June 2015
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- A Jitter Injection Signal Generation and Extraction System for Embedded Test of High-Speed Data I/O
Gordon W. Roberts
- Springer US