An optimized and area-efficient QCA-based subtractor with easy access to input and output: design and cost estimation

Quantum-dot Cellular Automata (QCA) is a novel computational paradigm in nanotechnology with some benefits, such as low energy usage, rapid speed, and high density. Several logical circuits have been examined in this nanotechnology, but subtractors with easy access to inputs and outputs cells are not explored thoroughly. Due to the lack of easy access to inputs and outputs, the previous designs are less expandable and cannot be easily used in other circuits. Subtractors are often executed within a binary adder when using the traditional two’s complement notation at just a small computational cost by providing an addition/subtraction selector to the carry-in and inverting the second operand. The same methodology as for adder's circuit can be used to create a subtractor, a digital circuit in nanoelectronics that performs numerical subtraction. Consequently, it is necessary to construct this circuit so that the inlets and outlets are simple to access. Therefore, a new QCA-based subtractor design is suggested in the present investigation. The scheme is then assessed and compared to state-of-the-art designs. This design offers a solution to the problem of access to input and output for data exchange in QCA. The suggested plan uses the least amount of space, the fewest number of cells, and delay three-layer crossing approaches as compared to the existing QCA design. The suggested subtractor needs 25 cells and takes up 0.01 µm². The QCADesigner tool provides this circuit’s simulation results and confirms the suggested circuit’s exactification. The suggested circuit is among the best regarding the area, cell counts, and quantum costs.