2014 | OriginalPaper | Buchkapitel
Arbitration and Reversibility of Parallel Delay-Insensitive Modules
verfasst von : Daniel Morrison, Irek Ulidowski
Erschienen in: Reversible Computation
Verlag: Springer International Publishing
Aktivieren Sie unsere intelligente Suche, um passende Fachinhalte oder Patente zu finden.
Wählen Sie Textabschnitte aus um mit Künstlicher Intelligenz passenden Patente zu finden. powered by
Markieren Sie Textabschnitte, um KI-gestützt weitere passende Inhalte zu finden. powered by
We analyse the external behaviour of parallel delay-insensitive modules in order to formalise the notions of arbitration and reversibility, and investigate universality of classes of such modules. A new notation for parallel modules is developed, where inputs can be sets of signals, which is used to define arbitration and module inversion. We show that arbitrating modules are more expressive than non-arbitrating modules, and propose universal sets for two classes of non-arbitrating modules. We demonstrate previously unrealised constructions of
M
×
N
Join
and
M
×
N
Fork
in terms of purely reversible and non-arbitrating modules.