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Erschienen in: Microsystem Technologies 5/2019

31.05.2017 | Technical Paper

Assessment of analog RF performance for insulated shallow extension (ISE) cylindrical surrounding gate (CSG) MOSFET incorporating gate stack

verfasst von: Nitin Trivedi, Manoj Kumar, Subhasis Haldar, S. S. Deswal, Mridula Gupta, R. S. Gupta

Erschienen in: Microsystem Technologies | Ausgabe 5/2019

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Abstract

In this paper, insulated shallow extension cylindrical surrounding gate (ISE-CSG) MOSFET with high-k gate stack has been proposed and extensively investigated. The performance of high-k ISE-CSG MOSFET has been compared with cylindrical surrounding gate MOSFET. ISE-CSG with high-k gate stack has number of desirable features at 30 nm regimes. The results reveal that ISE-CSG MOSFET with gate stack is more immune to short channel effects because of improved carrier transportation capability. It has been observed that high-k ISE-CSG MOSFET shows improved figure of merits as drive current (ION), ION/IOFF ratio, transconductance (gm), cutoff frequency fT, transconductance generation factor, intrinsic gain (Av), transconductance frequency product, gain transconductance frequency product and gain frequency product. ISE-CSG with high-k gives better control over the depletion region and therefore it is a suitable device for high speed, high frequency and analog/RF circuit applications.

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Metadaten
Titel
Assessment of analog RF performance for insulated shallow extension (ISE) cylindrical surrounding gate (CSG) MOSFET incorporating gate stack
verfasst von
Nitin Trivedi
Manoj Kumar
Subhasis Haldar
S. S. Deswal
Mridula Gupta
R. S. Gupta
Publikationsdatum
31.05.2017
Verlag
Springer Berlin Heidelberg
Erschienen in
Microsystem Technologies / Ausgabe 5/2019
Print ISSN: 0946-7076
Elektronische ISSN: 1432-1858
DOI
https://doi.org/10.1007/s00542-017-3456-z

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