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In this contribution, we discuss our recent advances in the automated design of continuous-time sigma-delta modulators. In the state of the art, the architectural and circuit level design of these modulators, especially if high-speed, low power or high resolution is targeted, either requires broad experience in the loop filter design, or relies on mathematical transformations which does not include the influence of non-idealities nor gives control about the signal transfer function, or the design is based on a very time consuming, massive simulation approach. Our solution is based on a detailed high level modeling, which allows to include many of the common non-idealities into the architectural design. By using an exact DT simulation of the CT modulator, and by employing a GPU-based heuristic search, a quasi real-time design optimization is obtained. The adoption of this tool, which is online available via a web page, is shown for the design of a 50 MHz, 10 bit sigma-delta modulator.
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- Automated Design of High-Speed CT ΣΔ Modulators Employing Compensation and Correction of Non-idealities