Skip to main content

2019 | OriginalPaper | Buchkapitel

9. Automated Search-Based Functional Approximation for Digital Circuits

verfasst von : Lukas Sekanina, Zdenek Vasicek, Vojtech Mrazek

Erschienen in: Approximate Circuits

Verlag: Springer International Publishing

Aktivieren Sie unsere intelligente Suche, um passende Fachinhalte oder Patente zu finden.

search-config
loading …

Abstract

The problem of developing an approximate implementation of a given combinational circuit can be formulated as a multi-objective design problem and solved by means of a search algorithm. This approach usually provides many solutions showing high-quality tradeoffs between key design objectives; however, it is very computationally expensive. This chapter presents a general-purpose method based on genetic programming for an automated functional approximation of combinational circuits at the gate and register-transfer levels. It surveys relevant error metrics and circuit parameters that are typically optimized by genetic programming. A special attention is given to the techniques capable of providing formal guarantees in terms of error bounds and accelerating the search process. Case studies dealing with approximate implementations of arithmetic circuits and image operators are presented to highlight the quality of results obtained by the search-based functional approximation in completely different application domains.

Sie haben noch keine Lizenz? Dann Informieren Sie sich jetzt über unsere Produkte:

Springer Professional "Wirtschaft+Technik"

Online-Abonnement

Mit Springer Professional "Wirtschaft+Technik" erhalten Sie Zugriff auf:

  • über 102.000 Bücher
  • über 537 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Maschinenbau + Werkstoffe
  • Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

Springer Professional "Technik"

Online-Abonnement

Mit Springer Professional "Technik" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 390 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Maschinenbau + Werkstoffe




 

Jetzt Wissensvorsprung sichern!

Fußnoten
1
Note that the SAT problem can be solved using a solver based on ROBDDs. By a SAT-based solver, we mean a variant of SAT algorithm typically based on DPLL backtracking operating at the level of CNF.
 
Literatur
1.
Zurück zum Zitat Ceska M, Matyas J, Mrazek V, Sekanina L, Vasicek Z, Vojnar T (2017) Approximating complex arithmetic circuits with formal error guarantees: 32-bit multipliers accomplished. In: Proceedings of 36th IEEE/ACM international conference on computer aided design. IEEE, Piscataway, pp 416–423 Ceska M, Matyas J, Mrazek V, Sekanina L, Vasicek Z, Vojnar T (2017) Approximating complex arithmetic circuits with formal error guarantees: 32-bit multipliers accomplished. In: Proceedings of 36th IEEE/ACM international conference on computer aided design. IEEE, Piscataway, pp 416–423
2.
Zurück zum Zitat Chan WTJ, Kahng AB, Kang S, Kumar R, Sartori J (2013) Statistical analysis and modeling for error composition in approximate computation circuits. In: 31st IEEE international conference on computer design (ICCD), pp 47–53 Chan WTJ, Kahng AB, Kang S, Kumar R, Sartori J (2013) Statistical analysis and modeling for error composition in approximate computation circuits. In: 31st IEEE international conference on computer design (ICCD), pp 47–53
3.
Zurück zum Zitat Chandrasekharan A, Soeken M, Große D, Drechsler R (2016) Precise error determination of approximated components in sequential circuits with model checking. In: Proceedings of DAC’16. ACM, New York, pp 129:1–129:6 Chandrasekharan A, Soeken M, Große D, Drechsler R (2016) Precise error determination of approximated components in sequential circuits with model checking. In: Proceedings of DAC’16. ACM, New York, pp 129:1–129:6
4.
Zurück zum Zitat Chen TH, Alaghi A, Hayes JP (2014) Behavior of stochastic circuits under severe error conditions. Inf Technol 56:182–191 Chen TH, Alaghi A, Hayes JP (2014) Behavior of stochastic circuits under severe error conditions. Inf Technol 56:182–191
5.
Zurück zum Zitat Deb K, Pratap A, Agarwal S, Meyarivan T (2002) A fast and elitist multiobjective genetic algorithm: NSGA-II. IEEE Trans Evol Comput 6(2):182–197CrossRef Deb K, Pratap A, Agarwal S, Meyarivan T (2002) A fast and elitist multiobjective genetic algorithm: NSGA-II. IEEE Trans Evol Comput 6(2):182–197CrossRef
6.
Zurück zum Zitat Hrbacek R, Mrazek V, Vasicek Z (2016) Automatic design of approximate circuits by means of multi-objective evolutionary algorithms. In: Proceedings of the 11th international conference on design and technology of integrated systems in nanoscale era. IEEE, Piscataway, pp 239–244 Hrbacek R, Mrazek V, Vasicek Z (2016) Automatic design of approximate circuits by means of multi-objective evolutionary algorithms. In: Proceedings of the 11th international conference on design and technology of integrated systems in nanoscale era. IEEE, Piscataway, pp 239–244
9.
Zurück zum Zitat Jiang H, Liu C, Maheshwari N, Lombardi F, Han J (2016) A comparative evaluation of approximate multipliers. In: IEEE/ACM international symposium on nanoscale architectures. IEEE, Piscataway, pp 191–196 Jiang H, Liu C, Maheshwari N, Lombardi F, Han J (2016) A comparative evaluation of approximate multipliers. In: IEEE/ACM international symposium on nanoscale architectures. IEEE, Piscataway, pp 191–196
12.
15.
Zurück zum Zitat Miller JF, Thomson P, Fogarty T (1998) Designing electronic circuits using evolutionary algorithms. Arithmetic Circuits: A Case Study. Wiley, New York, pp 105–131 Miller JF, Thomson P, Fogarty T (1998) Designing electronic circuits using evolutionary algorithms. Arithmetic Circuits: A Case Study. Wiley, New York, pp 105–131
17.
Zurück zum Zitat Mrazek V, Vasicek Z (2016) Automatic design of arbitrary-size approximate sorting networks with error guarantee. In: 2016 26th international workshop on power and timing modeling, optimization and simulation. IEEE Computer Society, Piscataway, pp 221–228 Mrazek V, Vasicek Z (2016) Automatic design of arbitrary-size approximate sorting networks with error guarantee. In: 2016 26th international workshop on power and timing modeling, optimization and simulation. IEEE Computer Society, Piscataway, pp 221–228
18.
Zurück zum Zitat Mrazek V, Sarwar SS, Sekanina L, Vasicek Z, Roy K (2016) Design of power-efficient approximate multipliers for approximate artificial neural networks. In: Proceedings of the IEEE/ACM international conference on computer-aided design. ACM, New York, pp 811–817. https://doi.org/10.1145/2966986.2967021 Mrazek V, Sarwar SS, Sekanina L, Vasicek Z, Roy K (2016) Design of power-efficient approximate multipliers for approximate artificial neural networks. In: Proceedings of the IEEE/ACM international conference on computer-aided design. ACM, New York, pp 811–817. https://​doi.​org/​10.​1145/​2966986.​2967021
20.
Zurück zum Zitat Nepal K, Li Y, Bahar RI, Reda S (2014) ABACUS: a technique for automated behavioral synthesis of approximate computing circuits. In: Proceedings of the conference on design, automation and test in Europe, EDA consortium, DATE’14, pp 1–6 Nepal K, Li Y, Bahar RI, Reda S (2014) ABACUS: a technique for automated behavioral synthesis of approximate computing circuits. In: Proceedings of the conference on design, automation and test in Europe, EDA consortium, DATE’14, pp 1–6
23.
Zurück zum Zitat Sekanina L, Vasicek Z (2013) Approximate circuits by means of evolvable hardware. In: 2013 IEEE international conference on evolvable systems, IEEE CIS, Proceedings of the 2013 IEEE symposium series on computational intelligence (SSCI), pp 21–28 Sekanina L, Vasicek Z (2013) Approximate circuits by means of evolvable hardware. In: 2013 IEEE international conference on evolvable systems, IEEE CIS, Proceedings of the 2013 IEEE symposium series on computational intelligence (SSCI), pp 21–28
24.
Zurück zum Zitat Sekanina L, Vasicek Z, Mrazek V (2017) Approximate circuits in low-power image and video processing: the approximate median filter. Radioengineering 26(3):623–632CrossRef Sekanina L, Vasicek Z, Mrazek V (2017) Approximate circuits in low-power image and video processing: the approximate median filter. Radioengineering 26(3):623–632CrossRef
27.
Zurück zum Zitat Vasicek Z, Sekanina L (2007) An area-efficient alternative to adaptive median filtering in FPGAs. In: Proceedings of 2007 international conference on field programmable logic and applications. IEEE, Piscataway, pp 216–221CrossRef Vasicek Z, Sekanina L (2007) An area-efficient alternative to adaptive median filtering in FPGAs. In: Proceedings of 2007 international conference on field programmable logic and applications. IEEE, Piscataway, pp 216–221CrossRef
28.
Zurück zum Zitat Vasicek Z, Sekanina L (2011) A global postsynthesis optimization method for combinational circuits. In: Proceedings of the design, automation and test in Europe DATE 2011, EDAA, pp 1525–1528 Vasicek Z, Sekanina L (2011) A global postsynthesis optimization method for combinational circuits. In: Proceedings of the design, automation and test in Europe DATE 2011, EDAA, pp 1525–1528
29.
Zurück zum Zitat Vasicek Z, Sekanina L (2014) Evolutionary design of approximate multipliers under different error metrics. In: IEEE international symposium on design and diagnostics of electronic circuits and systems. IEEE, Piscataway, pp 135–140 Vasicek Z, Sekanina L (2014) Evolutionary design of approximate multipliers under different error metrics. In: IEEE international symposium on design and diagnostics of electronic circuits and systems. IEEE, Piscataway, pp 135–140
31.
Zurück zum Zitat Vasicek Z, Sekanina L (2016) Evolutionary design of complex approximate combinational circuits. Genet Program Evolvable Mach 17(2):1–24CrossRef Vasicek Z, Sekanina L (2016) Evolutionary design of complex approximate combinational circuits. Genet Program Evolvable Mach 17(2):1–24CrossRef
32.
Zurück zum Zitat Vasicek Z, Slany K (2012) Efficient phenotype evaluation in Cartesian genetic programming. In: Proceedings of the 15th European conference on genetic programming. LNCS, vol 7244. Springer, Berlin, pp 266–278 Vasicek Z, Slany K (2012) Efficient phenotype evaluation in Cartesian genetic programming. In: Proceedings of the 15th European conference on genetic programming. LNCS, vol 7244. Springer, Berlin, pp 266–278
35.
Zurück zum Zitat Venkataramani S, Roy K, Raghunathan A (2013) Substitute-and-simplify: a unified design paradigm for approximate and quality configurable circuits. In: Design, automation and test in Europe, DATE’13, EDA consortium, pp 1367–1372 Venkataramani S, Roy K, Raghunathan A (2013) Substitute-and-simplify: a unified design paradigm for approximate and quality configurable circuits. In: Design, automation and test in Europe, DATE’13, EDA consortium, pp 1367–1372
36.
Zurück zum Zitat Venkatesan R, Agarwal A, Roy K, Raghunathan A (2011) MACACO: modeling and analysis of circuits for approximate computing. In: 2011 IEEE/ACM international conference on computer-aided design (ICCAD). IEEE, Piscataway, pp 667–673CrossRef Venkatesan R, Agarwal A, Roy K, Raghunathan A (2011) MACACO: modeling and analysis of circuits for approximate computing. In: 2011 IEEE/ACM international conference on computer-aided design (ICCAD). IEEE, Piscataway, pp 667–673CrossRef
Metadaten
Titel
Automated Search-Based Functional Approximation for Digital Circuits
verfasst von
Lukas Sekanina
Zdenek Vasicek
Vojtech Mrazek
Copyright-Jahr
2019
DOI
https://doi.org/10.1007/978-3-319-99322-5_9

Neuer Inhalt