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Introduction

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Fault Tolerant Computer Architecture

Part of the book series: Synthesis Lectures on Computer Architecture ((SLCA))

Abstract

For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever-faster transistors provided by Moore’s law into remarkable increases in performance. Recently, however, the bounty provided by Moore’s law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it.

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Authors and Affiliations

  1. Duke University, USA

    Daniel J. Sorin

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  1. Daniel J. Sorin
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Sorin, D. (2009). Introduction. In: Fault Tolerant Computer Architecture. Synthesis Lectures on Computer Architecture. Springer, Cham. https://doi.org/10.1007/978-3-031-01723-0_1

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