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Über dieses Buch

This book describes the basic technologies and operation principles of charge-trapping non-volatile memories. The authors explain the device physics of each device architecture and provide a concrete description of the materials involved as well as the fundamental properties of the technology. Modern material properties used as charge-trapping layers, for new applications are introduced.

Inhaltsverzeichnis

Frontmatter

Chapter 1. Introduction to NVM Devices

Abstract
Since the development of the first computer, the data storage has been a major procedure and the storage units are an intricate component of any computational machine. Data storage mainly includes the storage of the software program, the storage of data that are processed in real-time as well as the storage of information that can be recalled from the computational machine at any time or processed by another machine in a different place. For simplicity we call all these units used for software or data storage as memories. During the early years of the computer age, memories were made of many tiny magnetic cores and were as big as typical rooms in a house to store very short software programs or a few data. Magnetism was a well-known phenomenon and magnetic materials were some of the first materials having the hysteresis or the alternation between two different states depending on the magnetization direction, i.e., magnetic field up or down that is necessary for Boolean-logic devices.
Panagiotis Dimitrakis

Chapter 2. A Synopsis on the State of the Art of NAND Memories

Abstract
NAND memory has become the workhorse nonvolatile memory enabling massive amounts of data to be stored in many electronic devices. There is a high probability that the reader has several devices nearby which contain NAND memory. NAND memory’s combination of simplicity, low cost, high density, low power, and scalability in a solid state device has created a ubiquitous explosion in the NAND market. In 2014, it is estimated that ~6 × 1019 bytes of NAND was shipped (Greg Wong Forward Insights) which is enough to supply a gigabite to every person on the planet (7.2 billion). NAND has crushed less capable memory such as NOR in the market place and is continuing to take market share from hard disk drives pushing them out of the lower density market. As a historical reference a 2013 state of the art 128 Gb 16 nm NAND chip can hold as much data as ~11,000 circa 1986 1.44 MB 90 mm floppy disks which was state of the art at that time (Wikipedia). The impact of NAND on the electronic experience of the consumer has been huge and largely invisible. The accomplishments of the technologists and industry in taking NAND from its invention in 1987 to its dominant position today have been truly amazing. The technology proved to be easily scalable.
Kirk Prall, Nirmal Ramaswamy, Akira Goda

Chapter 3. Charge-Trap Memories with Ion Beam Modified ONO Stacks

Abstract
The nonvolatile memory (NVM) concept based on the injection and storage of charges in the floating-gate (FG) of a MISFET device was introduced in 1967 (Kahng 1967). Since then, this kind of memory device has evolved utilizing advances in material technology and device design (Groeseneken 1997; Fazio 2004), leading to the Flash memories, which are the prevailing NVM technology at present (see Chap. 1). The latter become a significant part of the semiconductor market especially in the last decade as a result of the rapid market expansion of the portable systems (Lu 2010). Introduced also in the late sixties, the “charge trap” (CT) memory refers to a device structure and operating principles similar to those of a FG memory. The main difference between these two kinds of NVMs is that the charges are stored in a conducting material (usually a doped polysilicon layer) in the case of the FG memories, while for the CT memories charge storage takes place in localized traps within a dielectric layer (typically made of silicon nitride). As recalled in Sect. 3.2 of this chapter, the CT memories have been the focus of intense research and product development since the early demonstration of MNOS devices. In recent years, they benefited from remarkable advances in thin film technology and charge-trap engineering, which have increased their potential to move from niche applications (e.g., smartcards, specific space and military systems) to mass applications guided today by the growing demands of the portable market. The conventional FG memories, despite their leading role in NVMs, are facing a number of challenges as scaling continues beyond the 22 nm technology node (to date at 19–16 nm, third Q 2014). Severe issues are the floating-gate interference effect between adjacent memory cells, the patterning costs and the reduction of the tunnel oxide thickness (Mark 2013; Libsch and White 1990). Compared to the FG memories, the advantages of the CT memories in terms of scalability and fabrication requirements (and thus in production costs) make them particularly attractive for the further development of ultra-scaled NVMs for both standalone and embedded applications. In addition to the brief historical outline and state of the art of the CT memories presented in Sect. 3.2, two technological options related to the use of the low-energy (LE) Si ion-implantation technique for achieving improved CT memories are described in Sects. 3.3 and 3.4. Section 3.3 reports on the development of CT devices using a nitride layer with an embedded thin band of Si nanoparticles, while Sect. 3.4 deals with CT devices employing a control oxide layer obtained by low-temperature oxidation of LE Si-implanted nitride film. These technological options are part of our investigations we conducted the last 20 years in the field of NVMs.
V. Ioannou-Sougleridis, Panagiotis Dimitrakis, Pascal Normand

Chapter 4. 3D NAND Flash Architectures

Abstract
Because NAND Flash possesses several advantages such as very high density, low cost, low power consumption, high programming and reading throughput, and compact form factor, it has been widely adopted as a necessary key component of most modern consumer electronics. Now it even penetrates into the enterprise applications, and it is expected that NAND Flash will continue to enjoy a brilliant market growth in the near future.
Hang-Ting Lue

Chapter 5. Quantum Dot Nonvolatile Memories

Abstract
For more than two decades there has been increasing interest in the development of semiconductor quantum dots (QDs) in dielectric matrices for electronic and optoelectronic applications. In particular, major efforts have been placed on the realization of the so-called QD (or nanocrystal, NC) memories in an attempt to overcome the scaling issues of conventional Flash nonvolatile memory (NVM) devices primarily for embedded memory applications, such as built-in memory arrays for microcontrollers (MCU) and system-on-chip (SoC). Embedded nonvolatile memories (e-NVM) do not require high storage capabilities. Nevertheless, a technology for e-NVMs should support operation compatibility with the logic circuit transistors, design libraries, CMOS performance, and reduced cost. The latest is strongly related to the additional masks and processing steps required in e-NVMs integration.
Panagiotis Dimitrakis, Pascal Normand, V. Ioannou-Sougleridis

Chapter 6. Two-Terminal Organic Memories with Metal or Semiconductor Nanoparticles

Abstract
The rapid development of information technology has higher and higher demand for high-speed and high-density memory devices. In addition, flexible memories are required as the key units of flexible electronic systems that are regarded as the next-generation electronic systems. Two-terminal organic devices embedded with metal or semiconductor nanoparticles can exhibit resistive switches and stability in different resistance states. This electrical behavior renders them important application as memories. These organic memory devices can have high density and high mechanical flexibility, and the fabrication cost for them can be quite low. Several types of organic memory devices have been demonstrated. The first type of the devices has a triple-layer structure with a layer of metal nanoparticles sandwiched between two organic layers. The other types of the organic memories have a single-layer structure with metal or semiconductor nanoparticles or nanoparticle/polymer composites embedded in the single polymer layer. Several mechanisms have been proposed for the resistive switches, including the electric-field induced charge transfer between nanoparticles and another component, the charge trapping on nanoparticles, and electric-field induced polarization. In addition, a new type of organic memories was recently demonstrated, which explored the charge transfer between metal nanoparticles and bulk metal electrode. The organic memories can potentially solve technique bottlenecks in the present leading memory devices. Apart from the application as memories, organic memories can be used for other electronic systems. For example, the combination of organic memories with light-emitting diodes can give rise to electronic papers.
Jianyong Ouyang
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