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1996 | Supplement | Buchkapitel

Conclusions

verfasst von : Mohamed S. Ben Romdhane, Vijay K. Madisetti, John W. Hines

Erschienen in: Quick-Turnaround ASIC Design in VHDL

Verlag: Springer US

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Application Specific Integrated Circuits (ASICs) have kept pace pace with the increasing complexity of applications and their demands for higher data rates, though this situation seems ready to change. Estimates show that the capability (in terms of gates) to design efficiently would lag considerably behind the capability to manufacture ASICs. New factors that influence the design of ASICs are also to be taken into consideration. These include; deep submicron designs, developments in synthesis and top-down design using hardware description languages (HDLs), and increasing time-to-market pressures. The primary goal is to provide users with desirable features such as — flexibility, ease-of-use, high reuse, quick-turnaround, high performance, integrability, accuracy, portability, and reliability. Existing design methodologies and environments support a few of these desirable features (see section 2.3). The purpose of this monograph was to define a design methodology for ASSPs that provides a competitive advantage to an organization through the use of commercial-off-the shelf (COTS) CAD/ESDA design environments.

Metadaten
Titel
Conclusions
verfasst von
Mohamed S. Ben Romdhane
Vijay K. Madisetti
John W. Hines
Copyright-Jahr
1996
Verlag
Springer US
DOI
https://doi.org/10.1007/978-1-4613-1411-0_7

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