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In the present-day VLSI system, low power design plays a noteworthy role. As we know that, a circuit with higher power consumption can ruin the performance of the system because in the modern world most of the systems are portable. Subsequently, they are functioned by the batteries. Therefore, it is desirable to have a system which operates at lower supply voltages along with maintaining the performance of the system. This low power system can be attained by abating the leakages of the devices up-to an enormous magnitude. In the contemporary VLSI system, a major role is being contributed by the Schmitt trigger circuit. Schmitt trigger is fundamentally a comparator. It is implemented by using a positive feedback. The Schmitt trigger circuit is used in various devices such as buffer, sub-threshold SRAM, sensors and PWM circuit. It is also used in analog to digital converter. The most significant property of the Schmitt trigger is that they provide hysteresis in their voltage transfer curve. Consequently, they provide better noise immunity as compared to their counterparts. Therefore it becomes quite important to enhance the performance of the Schmitt trigger circuit. The power dissipation of the device can be minimized by minimizing the sub-threshold current. The Schmitt trigger circuit is very imperative in producing a clean pulse from the input signal comprising of noise. There are various applications of Schmitt trigger circuit such as in scheming the oscillator circuit, analog to digital converter, function generator, signal conditioning and numerous applications. Thus, it becomes noteworthy to boost its performance by plummeting the leakages and power consumption of the Schmitt trigger circuit. We have realized the Schmitt trigger circuit by the use of FinFET. Therefore, we have got some optimum output in the parameters such as hysteresis width, power consumption and total noise of the Schmitt trigger circuit, but the leakages have been augmented. Thereafter, we have implemented several techniques on the Schmitt trigger circuit to shrink the leakage current, leakage power and other parameters further. We have applied Self Controllable Voltage Level, Adaptive voltage level and MTCMOS technique on the Schmitt trigger circuit using FinFET to further augment the presentation. All the circuits have been simulated in the virtuoso tool of the cadence in 45 nm VLSI domain. We have applied 0.7 V of the supply voltage to perform the simulation and got some tremendous outcome.
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- Design and Enactment of Diverse Low Power Techniques Based Schmitt Trigger
Mukesh Kumar Singh
- Springer US