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2013 | OriginalPaper | Buchkapitel

8. Design and Management of VFI Partitioned Networks-on-Chip

verfasst von : Umit Y. Ogras, Radu Marculescu

Erschienen in: Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures

Verlag: Springer Netherlands

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Abstract

The design of many core systems-on-chip (SoCs) has become increasingly challenging due to high levels of integration, excessive energy consumption, and clock distribution problems. To deal with these issues, this chapter considers network-on-chip (NoC) architectures partitioned into several voltage-frequency islands (VFIs) and propose a design methodology for runtime energy management. The proposed approach minimizes the energy consumption subject to performance constraints. Then, we present efficient techniques for on-the-fly workload monitoring and management to ensure that the system can cope with variability in the workload and various technology-related parameters. Finally, the results and functional correctness are validated using an FPGA prototype for an NoC with multiple VFIs.

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Fußnoten
1
fmincon is a function provided by Matlab that solves constrained nonlinear optimization (or nonlinear programming) problems [26].
 
Literatur
1.
Zurück zum Zitat Arjomand M, Sarbazi-Azad H (2010) Voltage-frequency planning for thermal-aware, low-power design of regular 3-D NoCs. In: 23rd international conferene on VLSI design Arjomand M, Sarbazi-Azad H (2010) Voltage-frequency planning for thermal-aware, low-power design of regular 3-D NoCs. In: 23rd international conferene on VLSI design
2.
Zurück zum Zitat Bertozzi D et al (2005) NoC synthesis flow for customized domain specific multiprocessor systems-on-chip. IEEE Trans Parallel Distrib Syst 16(2):113–129CrossRef Bertozzi D et al (2005) NoC synthesis flow for customized domain specific multiprocessor systems-on-chip. IEEE Trans Parallel Distrib Syst 16(2):113–129CrossRef
3.
Zurück zum Zitat Bjerregaard T, Sparso J (2005) A router architecture for connection-oriented service guarantees in the MANGO clockless network-on-chip. In: Proceedings of design, automation and test in Europe conference, March 2005 Bjerregaard T, Sparso J (2005) A router architecture for connection-oriented service guarantees in the MANGO clockless network-on-chip. In: Proceedings of design, automation and test in Europe conference, March 2005
4.
Zurück zum Zitat Bogdan P, Marculescu R (2010) Workload characterization and its impact on multicore platform design. In: Proceedings of the 8th IEEE/ACM/IFIP international conferene on hardware/software codesign and system synthesis (CODES/ISSS) Bogdan P, Marculescu R (2010) Workload characterization and its impact on multicore platform design. In: Proceedings of the 8th IEEE/ACM/IFIP international conferene on hardware/software codesign and system synthesis (CODES/ISSS)
5.
Zurück zum Zitat Butts JA, Sohi GS (2000) A static power model for architects. In: Proceedings of international symposium of microarchitecture, Dec 2000 Butts JA, Sohi GS (2000) A static power model for architects. In: Proceedings of international symposium of microarchitecture, Dec 2000
6.
Zurück zum Zitat Burd TD, Brodersen RW (2000) Design issues for dynamic voltage scaling. In: International symposium on low power electronics and design Burd TD, Brodersen RW (2000) Design issues for dynamic voltage scaling. In: International symposium on low power electronics and design
7.
Zurück zum Zitat Campobello G, Castano M, Ciofi C, Mangano D (2006) GALS networks on chip: a new solution for asynchronous delay-insensitive links. In: Proceedings of design, automation and test in Europe conference, March 2006 Campobello G, Castano M, Ciofi C, Mangano D (2006) GALS networks on chip: a new solution for asynchronous delay-insensitive links. In: Proceedings of design, automation and test in Europe conference, March 2006
8.
Zurück zum Zitat Chelcea T, Nowick SM (2000) A low latency fifo for mixed-clock systems. In: Proceedings of IEEE computer society workshop on VLSI, April 2000 Chelcea T, Nowick SM (2000) A low latency fifo for mixed-clock systems. In: Proceedings of IEEE computer society workshop on VLSI, April 2000
9.
Zurück zum Zitat Chapiro DM (1984) Globally asynchronous locally synchronous systems. PhD thesis, Stanford University Chapiro DM (1984) Globally asynchronous locally synchronous systems. PhD thesis, Stanford University
10.
Zurück zum Zitat Coskun AK et al (2010) Energy-efficient variable-flow liquid cooling in 3D stacked architectures. In: Proceedings of design automation and test in Europe, pp 1–6 Coskun AK et al (2010) Energy-efficient variable-flow liquid cooling in 3D stacked architectures. In: Proceedings of design automation and test in Europe, pp 1–6
11.
Zurück zum Zitat Dasgupta S, Yakovlev A (2007) Comparative analysis of GALS clocking schemes. IET Comput Digit Tech 1(2):59–69CrossRef Dasgupta S, Yakovlev A (2007) Comparative analysis of GALS clocking schemes. IET Comput Digit Tech 1(2):59–69CrossRef
12.
Zurück zum Zitat Dhillon YS, Diril AU, Chatterjee A, Lee HS (2003) Algorithm for achieving minimum energy consumption in CMOS circuits using multiple supply and threshold voltages at the module level. In: Proceedings of international conference on computer aided design, Nov 2003 Dhillon YS, Diril AU, Chatterjee A, Lee HS (2003) Algorithm for achieving minimum energy consumption in CMOS circuits using multiple supply and threshold voltages at the module level. In: Proceedings of international conference on computer aided design, Nov 2003
14.
Zurück zum Zitat Dielissen J, Radulescu A, Goossens K, Rijpkema E (2003) Concepts and implementation of the philips network-on-chip. IP-based SoC design Dielissen J, Radulescu A, Goossens K, Rijpkema E (2003) Concepts and implementation of the philips network-on-chip. IP-based SoC design
15.
Zurück zum Zitat Duarte DE, Vijaykrishnan N, Irwin MJ (2002) A clock power model to evaluate impact of architectural and technology optimizations. IEEE Trans Very Large Scale Integr Syst 10(6):884–855 Duarte DE, Vijaykrishnan N, Irwin MJ (2002) A clock power model to evaluate impact of architectural and technology optimizations. IEEE Trans Very Large Scale Integr Syst 10(6):884–855
16.
Zurück zum Zitat Garg S, Marculescu D, Marculescu R (2010) Custom feedback control: enabling truly scalable on-chip power management for MPSoCs. In: Proceedings of the ACM/IEEE international, symposium on low power electronics and design, Austin, TX Garg S, Marculescu D, Marculescu R (2010) Custom feedback control: enabling truly scalable on-chip power management for MPSoCs. In: Proceedings of the ACM/IEEE international, symposium on low power electronics and design, Austin, TX
17.
Zurück zum Zitat Ge Y, Malani P, Qiu Q (2010) Distributed task migration for thermal management in many-core systems. In: Design automation conference, Anaheim, June 2010 Ge Y, Malani P, Qiu Q (2010) Distributed task migration for thermal management in many-core systems. In: Design automation conference, Anaheim, June 2010
18.
Zurück zum Zitat Hu J, Marculescu R (2005) Communication and task scheduling of application-specific networks-on-chip. IEE Proc Comput Digit Tech 152(5):643–651 Hu J, Marculescu R (2005) Communication and task scheduling of application-specific networks-on-chip. IEE Proc Comput Digit Tech 152(5):643–651
19.
Zurück zum Zitat Hu J, Marculescu R (2005) Energy- and performance-aware mapping for regular NoC architectures. IEEE Trans Comput Aided Des Integr Circuits Syst 24(4):551–562CrossRef Hu J, Marculescu R (2005) Energy- and performance-aware mapping for regular NoC architectures. IEEE Trans Comput Aided Des Integr Circuits Syst 24(4):551–562CrossRef
22.
Zurück zum Zitat Juang P, Wu Q, Peh L, Martonosi M, Clark D (2005) Coordinated, distributed, formal energy management of chip multiprocessors. In: Proceedings of the ISLPED, Aug 2005 Juang P, Wu Q, Peh L, Martonosi M, Clark D (2005) Coordinated, distributed, formal energy management of chip multiprocessors. In: Proceedings of the ISLPED, Aug 2005
23.
Zurück zum Zitat Lackey DE, Zuchowski PS, Bednar TR, Stout DW, Gould SW, Cohn JM (2002) Managing power and performance for system-on-chip designs using voltage islands. In: Proceedings of international conference on computer aided design, Nov 2002 Lackey DE, Zuchowski PS, Bednar TR, Stout DW, Gould SW, Cohn JM (2002) Managing power and performance for system-on-chip designs using voltage islands. In: Proceedings of international conference on computer aided design, Nov 2002
24.
Zurück zum Zitat Magklis G, Semeraro G, Albonesi DH, Dropsho SG, Dwarkadas S, Scott ML (2003) Dynamic frequency and voltage scaling for a multiple clock domain microprocessor. IEEE Micro Special Issue: Top Picks Comput Archit 23(6):62–68 Magklis G, Semeraro G, Albonesi DH, Dropsho SG, Dwarkadas S, Scott ML (2003) Dynamic frequency and voltage scaling for a multiple clock domain microprocessor. IEEE Micro Special Issue: Top Picks Comput Archit 23(6):62–68
25.
Zurück zum Zitat Martin S, Flautner K, Mudge T, Blaauw D (2002) Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads. In: Proceedings of international conference on computer aided design, Nov 2002 Martin S, Flautner K, Mudge T, Blaauw D (2002) Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads. In: Proceedings of international conference on computer aided design, Nov 2002
27.
Zurück zum Zitat Millberg M, Nilsson E, Thid R, Kumar S, Jantsch A (2004) The Nostrum backbone—a communication protocol stack for networks on chip. In: Proceedings of VLSI design, Jan 2004 Millberg M, Nilsson E, Thid R, Kumar S, Jantsch A (2004) The Nostrum backbone—a communication protocol stack for networks on chip. In: Proceedings of VLSI design, Jan 2004
28.
Zurück zum Zitat Muttersbach J, Villager T, Fichtner W (2000) Practical design of globally asynchronous locally synchronous systems. In: Proceedings of international symposium on advanced research in asynchronous circuits and systems, April 2000 Muttersbach J, Villager T, Fichtner W (2000) Practical design of globally asynchronous locally synchronous systems. In: Proceedings of international symposium on advanced research in asynchronous circuits and systems, April 2000
29.
Zurück zum Zitat Nash SG, Sofer A (1996) Linear and nonlinear programming. McGraw-Hill, New York Nash SG, Sofer A (1996) Linear and nonlinear programming. McGraw-Hill, New York
30.
Zurück zum Zitat National Semiconductor Corporation (2004) Next-generation SoC power management with multi-domain adaptive voltage scaling. Electronics product design, March 2004 National Semiconductor Corporation (2004) Next-generation SoC power management with multi-domain adaptive voltage scaling. Electronics product design, March 2004
31.
Zurück zum Zitat Niyogi K, Marculescu D (2005) Speed and voltage selection for GALS systems based on voltage/frequency islands. In: Proceedings of Asia and South Pacific design automation conference, Jan 2005 Niyogi K, Marculescu D (2005) Speed and voltage selection for GALS systems based on voltage/frequency islands. In: Proceedings of Asia and South Pacific design automation conference, Jan 2005
32.
Zurück zum Zitat Ogata K (1995) Discrete-time control systems. Prentice-Hall, Upper Saddle River Ogata K (1995) Discrete-time control systems. Prentice-Hall, Upper Saddle River
33.
Zurück zum Zitat Sharifi S et al (2010) Hybrid dynamic energy and thermal management in heterogeneous embedded multiprocessor SoCs. In: Asia and south pacific design automation conference, pp 873–878, Jan 2010 Sharifi S et al (2010) Hybrid dynamic energy and thermal management in heterogeneous embedded multiprocessor SoCs. In: Asia and south pacific design automation conference, pp 873–878, Jan 2010
34.
Zurück zum Zitat Rasmussen J (1998) Nonlinear programming by cumulative approximation refinement. Struct Multidiscip Optim 15(1):1–7MathSciNetCrossRef Rasmussen J (1998) Nonlinear programming by cumulative approximation refinement. Struct Multidiscip Optim 15(1):1–7MathSciNetCrossRef
35.
Zurück zum Zitat Quartana J, Renane S, Baixas A, Fesquet L, Renaudin M (2005) GALS systems prototyping using multiclock FPGAs and asynchronous network-on-chips. In: Proceedings of international conference on field programmable logic and applications, Aug 2005 Quartana J, Renane S, Baixas A, Fesquet L, Renaudin M (2005) GALS systems prototyping using multiclock FPGAs and asynchronous network-on-chips. In: Proceedings of international conference on field programmable logic and applications, Aug 2005
36.
Zurück zum Zitat Sakurai T, Newton AR (1990) Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas. IEEE J Solid-State Circuits 25(2):584–594CrossRef Sakurai T, Newton AR (1990) Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas. IEEE J Solid-State Circuits 25(2):584–594CrossRef
37.
Zurück zum Zitat Schittkowski K (1986) NLPQL: a fortran subroutine solving constrained nonlinear programming problems. Ann Oper Res 5(1–4):485–500 Schittkowski K (1986) NLPQL: a fortran subroutine solving constrained nonlinear programming problems. Ann Oper Res 5(1–4):485–500
38.
Zurück zum Zitat Semiconductor Association (2006) The international technology roadmap for semiconductors (ITRS) Semiconductor Association (2006) The international technology roadmap for semiconductors (ITRS)
41.
Zurück zum Zitat Wu Q, Juang P, Martonosi M, Clark DW (2004) Formal online methods for voltage/frequency control in multiple clock domain microprocessors. In: Proceedings of the international conference on architectural support for programming languages and operating systems, Oct 2004 Wu Q, Juang P, Martonosi M, Clark DW (2004) Formal online methods for voltage/frequency control in multiple clock domain microprocessors. In: Proceedings of the international conference on architectural support for programming languages and operating systems, Oct 2004
42.
Zurück zum Zitat Xie F, Martonosi M, Malik S (2004) Intraprogram dynamic voltage scaling: bounding opportunities with analytic modeling. ACM Trans Archit Code Optim 1(3):323–367 Xie F, Martonosi M, Malik S (2004) Intraprogram dynamic voltage scaling: bounding opportunities with analytic modeling. ACM Trans Archit Code Optim 1(3):323–367
43.
Zurück zum Zitat Ye T, Benini L, De Micheli G (2002) Analysis of power consumption on switch fabrics in network routers. In: Proceedings of design automation conference, June 2002 Ye T, Benini L, De Micheli G (2002) Analysis of power consumption on switch fabrics in network routers. In: Proceedings of design automation conference, June 2002
44.
Zurück zum Zitat Zanini F, Atienza D, De Micheli G (2009) A control theory approach for thermal balancing of MPSoC. In: Proceedings of the Asia and south pacific design automation conference Zanini F, Atienza D, De Micheli G (2009) A control theory approach for thermal balancing of MPSoC. In: Proceedings of the Asia and south pacific design automation conference
Metadaten
Titel
Design and Management of VFI Partitioned Networks-on-Chip
verfasst von
Umit Y. Ogras
Radu Marculescu
Copyright-Jahr
2013
Verlag
Springer Netherlands
DOI
https://doi.org/10.1007/978-94-007-3958-1_8

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