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Erschienen in:
2011 | OriginalPaper | Buchkapitel
Design of Dual-Shared DRAM Controller Based on Switch
verfasst von : Yifeng Li, Bo Zhang, Xiaoxia Han, Gang Zhang
Erschienen in: Emerging Research in Web Information Systems and Mining
Verlag: Springer Berlin Heidelberg
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According to the harsh desire to share memory of multi-processors system on chip, this paper presents a switch-based Dual-Shared DRAM Controller (DSMC). The DSMC is composed of center control module, two IP(interface to processor) module, two ID(interface to DRAM) module, CM(Clock Manager) module, and IR(initialize and refresh) module. It use two memories as shared memory and resolves conflicts which may occur when two processors access the same memory, and actualizes every control to DRAM, such as initializing, refreshing, reading and writing. At last, it makes two processors access the shared memories coinstantaneous at will.