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Erschienen in:

13.03.2023

Digital-to-analog converter implementation based on silicon nanowire FET

verfasst von: Ashkan Horri

Erschienen in: Journal of Computational Electronics | Ausgabe 3/2023

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Abstract

In this paper, a silicon nanowire (SiNW) FET-based DAC is proposed and simulated. The proposed DAC is based on SiNW unit element current cells and logic thermometric decoding block. The FET current is calculated by using non-equilibrium Green’s function (NEGF) formalism. The unit current cell geometry and bias condition were chosen to maximize \(I_{\text {ON}}/I_{\text {OFF}}\) ratio and to minimize differential nonlinearity (DNL) and integral nonlinearity (INL) errors. The simulation results indicate a DNL of [\(-\)0.19,0.17]LSB and an INL of [\(-\)0.61,0.335]LSB errors that meet the requirement for 5-bit resolution at 0.4 V operating voltage. Also, the low DAC active area of 351 nm2 was obtained that is suitable for very large-scale integration (VLSI) circuits.

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Metadaten
Titel
Digital-to-analog converter implementation based on silicon nanowire FET
verfasst von
Ashkan Horri
Publikationsdatum
13.03.2023
Verlag
Springer US
Erschienen in
Journal of Computational Electronics / Ausgabe 3/2023
Print ISSN: 1569-8025
Elektronische ISSN: 1572-8137
DOI
https://doi.org/10.1007/s10825-023-02025-9