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Journal of Computational Electronics
Erschienen in: Journal of Computational Electronics 2/2015

01.06.2015

Dual metal-double gate tunnel field effect transistor with mono/hetero dielectric gate material

verfasst von: Prateek Jain, Vishwa Prabhat, Bahniman Ghosh

Erschienen in: Journal of Computational Electronics | Ausgabe 2/2015

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Abstract

In this paper, dual metal-double gate tunnel field effect transistor (DMG-DGTFET) is discussed for mono & hetero dielectric gate material. The hetero dielectric that we have used at the gate is a combination of SiO\(_{\text{2 }}\) and HfO\(_{\text{2 }}\). The DMG technique is used to optimize the performance of DGTFET along with the mono/hetero dielectric gate material. The results obtained from the simulation are discussed using energy band diagram, tunneling barrier width and compared with hetero & mono dielectric gate. With the application of hetero dielectric to the DMG-DGTFET, the advantages of both the techniques combine and the results shows that higher \(I_{ON} /I_{OFF}\) ratio \((2\times 10^{9})\) compared to the mono dielectric case \((2.5\times 10^{8})\). The average subthreshold slope also improves from 58 mV/decade in mono dielectric to 48 mV/decade in hetero dielectric DMG-DGTEFT. All the simulations are done in Synopsys TCAD for a channel length of 25 nm using the non-local tunneling model.
Vorheriger Artikel Hybrid methodology to model random dopant fluctuations in low doped FinFETs
Nächster Artikel Multimillion-atom modeling of InAs/GaAs quantum dots: interplay of geometry, quantization, atomicity, strain, and linear and quadratic polarization fields

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Metadaten
Titel
Dual metal-double gate tunnel field effect transistor with mono/hetero dielectric gate material
verfasst von
Prateek Jain
Vishwa Prabhat
Bahniman Ghosh
Publikationsdatum
01.06.2015
Verlag
Springer US
Erschienen in
Journal of Computational Electronics / Ausgabe 2/2015
Print ISSN: 1569-8025
Elektronische ISSN: 1572-8137
DOI
https://doi.org/10.1007/s10825-015-0685-1

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