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2013 | Buch

Introduction Kapitel lesen Erstes Kapitel lesen

Dynamic-Mismatch Mapping for Digitally-Assisted DACs

verfasst von: Yongjian Tang, Hans Hegt, Arthur van Roermund

Verlag: Springer New York

Buchreihe : Analog Circuits and Signal Processing

Enthalten in: Springer Professional "Wirtschaft+Technik" , Springer Professional "Technik"

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SUCHEN

Über dieses Buch

This book describes a novel digital calibration technique called dynamic-mismatch mapping (DMM) to improve the performance of digital to analog converters (DACs). Compared to other techniques, the DMM technique has the advantage of calibrating all mismatch errors without any noise penalty, which is particularly useful in order to meet the demand for high performance DACs in rapidly developing applications, such as multimedia and communication systems.

Inhaltsverzeichnis

Frontmatter
Chapter 1. Introduction
Abstract
Since the invention of the first semiconductor transistor in the 1940s and the breakthrough in the 1960s, microelectronics has been one of the most rapidly developed technologies in the past few decades. The advanced microelectronics techniques, such as integrated circuits (ICs), dramatically reformed our daily life and scientific research, such as space technique, sensing technique, telecommunications, computer science and multimedia entertainment.
Yongjian Tang, Hans Hegt, Arthur van Roermund
Chapter 2. Digital-to-Analog Converters
Abstract
In this chapter, the concept and performance specifications of digital-to-analog converters (DACs) are reviewed. Different DAC architectures and physical implementations are introduced. Recently published state-of-the-art DACs are summarized to show the performance limitations.
Yongjian Tang, Hans Hegt, Arthur van Roermund
Chapter 3. Modeling and Analysis of Performance Limitations in CS-DACs
Abstract
Dependent on where the errors are generated and how they affect the performance, errors in a current-steering DAC (CS-DAC) can be distinguished as non-mismatch errors (global errors) and mismatch errors (local errors). As mentioned in Sect. 2.4.3, regardless of whether the CS-DAC has a binary or thermometer or segmented architecture, it is composed of many current cells. If those current cells deviate from their ideal behavior differently, mismatch errors (such as amplitude and timing errors) are generated. If current cells perfectly match, i.e. no mismatch errors, non-mismatch errors, such as clock jitter, absolute duty-cycle error, finite output impedance and switching interferences, may still limit the DAC performance.
Yongjian Tang, Hans Hegt, Arthur van Roermund
Chapter 4. Design Techniques for High-Performance Intrinsic and Smart CS-DACs
Abstract
In the previous chapter, the non-idealities in CS-DACs have been discussed and their impact on the DAC performance have been analyzed. In order to overcome these performance limitations, emerging design techniques for high-performance intrinsic and smart CS-DACs are introduced in this chapter. Firstly, the concept of smart DACs is introduced as intrinsic DACs with additional intelligence to acquire and utilize the actual chip information so that the performance/yield/reliability/flexibilty can be improved. Then, existing design techniques for intrinsic and smart DACs are discussed and summarized. Finally, a novel digital calibration technique for smart DACs, called dynamic-mismatch mapping (DMM), is initially introduced in this chapter and will be discussed further in the next chapters.
Yongjian Tang, Hans Hegt, Arthur van Roermund
Chapter 5. A Novel Digital Calibration Technique: Dynamic-Mismatch Mapping (DMM)
Abstract
In this chapter, a novel digital calibration technique, called dynamic-mismatch mapping (DMM), is proposed to correct the non-linear effect caused by both amplitude and timing mismatch errors. The theoretical background of this proposed DMM is firstly explained. How to implement DMM in an easy and efficient way is discussed next. Matlab Monte-Carlo statistical simulations are also performed in this section to show the performance improvement by DMM, with a comparison to traditional static-mismatch mapping techniques. Finally, the application of DMM is discussed and summarized.
Yongjian Tang, Hans Hegt, Arthur van Roermund
Chapter 6. An On-chip Dynamic-Mismatch Sensor Based on a Zero-IF Receiver
Abstract
The proposed dynamic-mismatch mapping technique introduced in Chap.​ 5 requires the dynamic-mismatch errors of current cells to be accurately measured. The architecture of a novel on-chip dynamic-mismatch sensor based on a zero-IF receiver was already proposed in Chap.​ 5. In this chapter, the circuit design and performance analysis of the proposed dynamic-mismatch sensor are discussed.
Yongjian Tang, Hans Hegt, Arthur van Roermund
Chapter 7. Design Example
Abstract
In this chapter, a design example of a 14-bit 0.14 μm CMOS current-steering DAC with the proposed dynamic-mismatch mapping (DMM) is described. The intrinsic DAC core shows a performance of SFDR > 65 dBc at 650 MS/s across the whole Nyquist band. The smart DAC with the proposed DMM achieves a performance of IM3 < -83 dBc, SFDR > 78 dBc and NSD < -163 dBm/Hz across the Nyquist band at 200 MS/s, which is at least 5 dB linearity improvement in the whole Nyquist band compared to the intrinsic performance, and the noise floor is not increased. Benchmarks are given, showing that this design has a state-of-the-art performance.
Yongjian Tang, Hans Hegt, Arthur van Roermund
Chapter 8. Conclusions
Abstract
In the signal frequency range from DC to several hundreds of MHz, mismatch errors, including amplitude and timing errors, are typical dominant factors in the linearity of current-steering DACs. Moreover, as signal and sampling frequencies increase, the effect of timing errors becomes more and more dominant over that of amplitude errors.
Yongjian Tang, Hans Hegt, Arthur van Roermund
Backmatter
Metadaten
Titel
Dynamic-Mismatch Mapping for Digitally-Assisted DACs
verfasst von
Yongjian Tang
Hans Hegt
Arthur van Roermund
Copyright-Jahr
2013
Verlag
Springer New York
Electronic ISBN
978-1-4614-1250-2
Print ISBN
978-1-4614-1249-6
DOI
https://doi.org/10.1007/978-1-4614-1250-2

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