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Erschienen in:
19.02.2019
Effects of twin boundaries on the void formation in Cu-filled through silicon vias under thermal process
Erschienen in: Journal of Materials Science: Materials in Electronics | Ausgabe 6/2019
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Abstract
We reported on the study of the thermal mechanical reliability of Cu-filled through silicon via (TSV) under 450 °C thermal loading. It was found that the voids could be generated at twin boundaries in TSV-Cu after thermal process. To study the mechanism of void formation at twin boundaries, the voided regions were characterized by focused ion beam—scanning electron microscope (FIB-SEM), the crystallographic orientation of Cu grains and the microstructure of twin boundaries was analyzed by means of electron backscattered diffraction (EBSD) and transmission electron microscope (TEM). Stress induced voids were considered to be generated at twin boundaries because of the stress concentration induced by three possible factors: crystallographic orientation differences of Cu grains near the twin boundary, interface decohesion of twin boundary and morphology of twin boundary.