Skip to main content
Disciplines
Automotive Business IT + Informatics Construction + Real Estate Electrical Engineering + Electronics Energy + Sustainability Insurance + Risk Finance + Banking Management + Leadership Marketing + Sales Mechanical Engineering + Materials
Events
DE
EN
Books
Journals
Topic Page
Marketing
Start single access now
Access for companies
EXTENDED SEARCH
Log in
Top
Journal of Electronic Testing
Published in: Journal of Electronic Testing 4/2019

04-07-2019

16- Layer PCB Channel Design with Minimum Crosstalk and Optimization of VIA and TDR Analysis

Authors: A. Kavitha, Ch. Sekhararao Kaitepalli, J. N. Swaminathan, Shaik Ahemedali

Published in: Journal of Electronic Testing | Issue 4/2019

Log in

Activate our intelligent search to find suitable subject content or patents.

search-config
loading …

Abstract

A transparent interconnects on a 16 layer PCB stack-up with a 100 Ω differential impedance with interconnects is proposed in this paper. To minimize the differential crosstalk, a differential spacing is maintained between interconnects. The transmitter and receiver are demonstrated as Input Buffer Information Specification (IBIS) models. An IBIS model describes the V-I characteristics information about the particular buffer. To provide better channel performance, the interconnect Via structures are optimized in this paper. To observe the channel performance in the frequency domain, S-parameter analysis is performed. To view BER plots, eye diagram and bathtub curve analysis is implemented. To observe the impedance with respect to the propagation delay of the channel, Time Domain Reflectometer (TDR) analysis is performed. Debugging and impedance discontinuity correction are performed using TDR analysis. ADS 9 (Advanced Design System) simulation software is used in this paper.
previous article Retention-Aware Refresh Techniques for Reducing Power and Mitigation of Data Retention Faults in DRAM
next article Security Analysis and Improvement of the Pseudo-random Number Generator Based on Piecewise Logistic Map

Dont have a licence yet? Then find out more about our products and how to get one now:

Springer Professional "Wirtschaft+Technik"

Online-Abonnement

Mit Springer Professional "Wirtschaft+Technik" erhalten Sie Zugriff auf:

  • über 102.000 Bücher
  • über 537 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Maschinenbau + Werkstoffe
  • Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

inform now

Springer Professional "Technik"

Online-Abonnement

Mit Springer Professional "Technik" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 390 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Maschinenbau + Werkstoffe




 

Jetzt Wissensvorsprung sichern!

inform now

Springer Professional "Wirtschaft"

Online-Abonnement

Mit Springer Professional "Wirtschaft" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 340 Zeitschriften

aus folgenden Fachgebieten:

  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Versicherung + Risiko




Jetzt Wissensvorsprung sichern!

inform now
Show more products
Literature
1.
D. N. de Araujo, M. Cases, D. Kuchta, C. Baks, Y. Kwark, “Electrical Optical High-Speed Serial Server Scalability Link”, Proceedings of IEEE 56th Electronic Components and Technology Conference, June 2007.
2.
C. Chastang, C. Gautier, A. Amedeo, F. Costa THALES “Crosstalk Analysis of Multigigabit Links on High Density Interconnects PCB using IBIS AMI Models”, Proceedings of IEEE Electrical Design of Packaging and Systems Symposium, February 2013.
3.
Kai-Bin W, Lin C-Y, Huang S-Y, Ruey-Beei W (January 2016) Design of Stackup and Shorting Vias and for Reducing Edge Radiation in Multilayer PCB. Proceedings of IEEE Electrical Design of Packaging and Systems Symposium
4.
5.
Satoru Haga, Ken Nakano, Osamu Hashimoto,” Reduction in Radiated Emission from Multilayer PCBs by the Layer Structure Shielding a Power Plane” Electronics and Communications in Japan, Part 1, Vol. 88, No. 2, pp. 1139–1148, 2005.
6.
Almalkawi M, Devabhaktuni V (September 2011) Far-End Crosstalk Reduction in PCB Interconnects Using Stepped Impedance Elements and Open-Circuited Stubs. International Journal of RF and Microwave Computer-Aided Engineering 21(5):596–601CrossRef
7.
Laermans E, De Geest J, De Zutter D, Olyslager F, Sercu S, Morlion D (May 2002) Modeling Complex Via Hole Structures. IEEE Trans Adv Packag 25:206–214CrossRef
8.
Zenteno A, Reina D, Regalado G (2010) Optimization of PCB Via Design Considering its Physical Length Parameters. Proceedings of IEEE International Midwest Symposium on Circuits and Systems, August
9.
Agili SS, Smith SB, Balasubramanian V (February 2006) Characterization of the Electrical Performance of Different Signal Via Geometries. IEEE Microwave And Optical Technology Letters / 48(2):315–320CrossRef
10.
Kok P, De Zutter D (July 1991) Capacitance of a Circular Symmetric Model of a Via Hole Including Finite Ground Plane Thickness. IEEE Trans on Microwave Theory and Techniques 39:1229–1234CrossRef
11.
Ben Toby, “Rapid Design of High Performance 25+ GT/s Vias by Application of Decomposition and Image Impedance”, Signal Integrity Journal, 4-May 2017.
12.
Ki JH, XiaoxiongGu YHK, Shan L, Ritter MB (February 2014) Modeling On-Board Via Stubs and Traces in High-Speed Channels for Achieving Higher Data Bandwidth. IEEE Trans Compon Packag Manuf Technol 4(2)
13.
IBIS open forum “I/O Buffer Information Specification”, version 6.1, September 2015.
14.
Eric Bogatin “Signal and power Integrity simplified”, Second edition, Prentice Hall 2009.
15.
Douglas Brooks “Signal Integrity Issues and printed Circuit Board Design” Prentice Hall, June 2003.
16.
Howard Johnson, Martin Graham, “High-speed signal propagation: Advanced Black Magic” 1st Edition, Prentice Hall, Febraury 2003.
Metadata
Title
16- Layer PCB Channel Design with Minimum Crosstalk and Optimization of VIA and TDR Analysis
Authors
A. Kavitha
Ch. Sekhararao Kaitepalli
J. N. Swaminathan
Shaik Ahemedali
Publication date
04-07-2019
Publisher
Springer US
Published in
Journal of Electronic Testing / Issue 4/2019
Print ISSN: 0923-8174
Electronic ISSN: 1573-0727
DOI
https://doi.org/10.1007/s10836-019-05814-y

Other articles of this Issue 4/2019

Journal of Electronic Testing 4/2019 Go to the issue

OriginalPaper

Connectivity Test for System in Package Interconnects

OriginalPaper

Security Analysis and Improvement of the Pseudo-random Number Generator Based on Piecewise Logistic Map

OriginalPaper

Retention-Aware Refresh Techniques for Reducing Power and Mitigation of Data Retention Faults in DRAM

OriginalPaper

Hardware Trojan Detection Leveraging a Novel Golden Layout Model Towards Practical Applications

OriginalPaper

Electromagnetic Parameters Measurement of Sheet Using Separate Microstrip Line

OriginalPaper

Repeated Testing Applications for Improving the IC Test Quality to Achieve Zero Defect Product Requirements