Skip to main content
Top

2020 | OriginalPaper | Chapter

A Modular Software Library for Effective High Level Synthesis of Convolutional Neural Networks

Authors : Hector Gerardo Munoz Hernandez, Safdar Mahmood, Marcelo Brandalero, Michael Hübner

Published in: Applied Reconfigurable Computing. Architectures, Tools, and Applications

Publisher: Springer International Publishing

Activate our intelligent search to find suitable subject content or patents.

search-config
loading …

Abstract

Convolutional Neural Networks (CNNs) have applications in many valuable domains such as object detection for autonomous cars and security using facial recognition. This vast field of application usually places strict non-functional requirements such as resource-efficient implementations on the hardware devices, while at the same time requiring flexibility. In response, this work presents a C++-based software library of reusable modules to build arbitrary CNNs that support High-Level-Synthesis to be implemented as FPGA hardware accelerators for the inference process. Our work demonstrates how parametrization and modularization of basic building blocks of a CNN enable easier customization of the hardware to match the software model. This project also works with low-precision parameters throughout the CNN to provide a more resource-efficient implementation.

Dont have a licence yet? Then find out more about our products and how to get one now:

Springer Professional "Wirtschaft+Technik"

Online-Abonnement

Mit Springer Professional "Wirtschaft+Technik" erhalten Sie Zugriff auf:

  • über 102.000 Bücher
  • über 537 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Maschinenbau + Werkstoffe
  • Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

Springer Professional "Technik"

Online-Abonnement

Mit Springer Professional "Technik" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 390 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Maschinenbau + Werkstoffe




 

Jetzt Wissensvorsprung sichern!

Springer Professional "Wirtschaft"

Online-Abonnement

Mit Springer Professional "Wirtschaft" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 340 Zeitschriften

aus folgenden Fachgebieten:

  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Versicherung + Risiko




Jetzt Wissensvorsprung sichern!

Literature
2.
go back to reference Bacis, M., Natale, G., Del Sozzo, E., Santambrogio, M.D.: A pipelined and scalable dataflow implementation of convolutional neural networks on FPGA. In: 2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), May 2017, pp. 90–97 (2017) Bacis, M., Natale, G., Del Sozzo, E., Santambrogio, M.D.: A pipelined and scalable dataflow implementation of convolutional neural networks on FPGA. In: 2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), May 2017, pp. 90–97 (2017)
3.
go back to reference Bhandare, A., Bhide, M.V., Gokhale, P., Chandavarkar, R.: Applications of Convolutional Neural Networks (2016) Bhandare, A., Bhide, M.V., Gokhale, P., Chandavarkar, R.: Applications of Convolutional Neural Networks (2016)
4.
go back to reference Courbariaux, M., Hubara, I., Soudry, D., El-Yaniv, R. Bengio, Y.: Binarized neural networks: training deep neural networks with weights and activations constrained to +1 or \(-\)1 (2016). arXiv: 1602.02830 [cs.LG] Courbariaux, M., Hubara, I., Soudry, D., El-Yaniv, R. Bengio, Y.: Binarized neural networks: training deep neural networks with weights and activations constrained to +1 or \(-\)1 (2016). arXiv:​ 1602.​02830 [cs.LG]
5.
go back to reference Farabet, C., et al.: Hardware accelerated convolutional neural networks for synthetic vision systems. In: Proceedings of 2010 IEEE International Symposium on Circuits and Systems, May 2010, pp. 257–260 (2010) Farabet, C., et al.: Hardware accelerated convolutional neural networks for synthetic vision systems. In: Proceedings of 2010 IEEE International Symposium on Circuits and Systems, May 2010, pp. 257–260 (2010)
6.
go back to reference Fu, C., Zhu, S., Su, H., Lee, C.-E., Zhao, J.: Towards fast and energy-efficient binarized neural network inference on FPGA (2018). arXiv: 1810.02068 [cs.LG] Fu, C., Zhu, S., Su, H., Lee, C.-E., Zhao, J.: Towards fast and energy-efficient binarized neural network inference on FPGA (2018). arXiv:​ 1810.​02068 [cs.LG]
7.
go back to reference Fukushima, K., Miyake, S.: Neocognitron: a new algorithm for pattern recognition tolerant of deformations and shifts in position. Pattern Recogn. 15, 455–469 (1982)CrossRef Fukushima, K., Miyake, S.: Neocognitron: a new algorithm for pattern recognition tolerant of deformations and shifts in position. Pattern Recogn. 15, 455–469 (1982)CrossRef
9.
go back to reference Hailesellasie, M., Hasan, S.R., Mohamed, O.A.: MulMapper: towards an automated FPGA-Based CNN processor generator based on a dynamic design space exploration. In: 2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019, pp. 1–5 (2019) Hailesellasie, M., Hasan, S.R., Mohamed, O.A.: MulMapper: towards an automated FPGA-Based CNN processor generator based on a dynamic design space exploration. In: 2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019, pp. 1–5 (2019)
11.
go back to reference Huang, C., Ni, S., Chen, G.: A layer-based structured design of CNN on FPGA. In: 2017 IEEE 12th International Conference on ASIC (ASICON), October 2017, pp. 1037–1040 (2017) Huang, C., Ni, S., Chen, G.: A layer-based structured design of CNN on FPGA. In: 2017 IEEE 12th International Conference on ASIC (ASICON), October 2017, pp. 1037–1040 (2017)
12.
go back to reference Hubara, I., Courbariaux, M., Soudry, D., El-Yaniv, R., Bengio, Y.: Quantized neural networks: training neural networks with low precision weights and activations (2016). arXiv: 1609.07061 [cs.NE] Hubara, I., Courbariaux, M., Soudry, D., El-Yaniv, R., Bengio, Y.: Quantized neural networks: training neural networks with low precision weights and activations (2016). arXiv:​ 1609.​07061 [cs.NE]
13.
go back to reference Iandola, F.N., et al.: SqueezeNet: AlexNet-level accuracy with 50x fewer parameters and \(<\)0.5MB model size (2016). arXiv: 1602.07360 [cs.CV] Iandola, F.N., et al.: SqueezeNet: AlexNet-level accuracy with 50x fewer parameters and \(<\)0.5MB model size (2016). arXiv:​ 1602.​07360 [cs.CV]
15.
go back to reference Kluyver, T., et al.: Jupyter notebooks - a publishing format for reproducible computational workflows. In: Loizides, F., Scmidt, B. (eds.) Positioning and Power in Academic Publishing: Players, Agents and Agendas, pp. 87–90. IOS Press, Amsterdam (2016). https://eprints.soton.ac.uk/403913/ Kluyver, T., et al.: Jupyter notebooks - a publishing format for reproducible computational workflows. In: Loizides, F., Scmidt, B. (eds.) Positioning and Power in Academic Publishing: Players, Agents and Agendas, pp. 87–90. IOS Press, Amsterdam (2016). https://​eprints.​soton.​ac.​uk/​403913/​
18.
go back to reference Li, P., Li, J., Wang, G.: Application of convolutional neural network in natural language processing. In: 2018 15th International Computer Conference on Wavelet Active Media Technology and Information Processing (ICCWAMTIP), December 2018, pp. 120–122 (2018) Li, P., Li, J., Wang, G.: Application of convolutional neural network in natural language processing. In: 2018 15th International Computer Conference on Wavelet Active Media Technology and Information Processing (ICCWAMTIP), December 2018, pp. 120–122 (2018)
19.
go back to reference Natale, G., Bacis, M., Santambrogio, M.D.: On how to design dataflow FPGA-based accelerators for convolutional neural networks. In: 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2017, pp. 639–644 (2017) Natale, G., Bacis, M., Santambrogio, M.D.: On how to design dataflow FPGA-based accelerators for convolutional neural networks. In: 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2017, pp. 639–644 (2017)
21.
go back to reference Noronha, D.H., Salehpour, B., Wilton, S.J.E.: LeFlow: enabling flexible FPGA high-level synthesis of tensorflow deep neural networks (2018). arXiv: 1807.05317 [cs.LG] Noronha, D.H., Salehpour, B., Wilton, S.J.E.: LeFlow: enabling flexible FPGA high-level synthesis of tensorflow deep neural networks (2018). arXiv:​ 1807.​05317 [cs.LG]
23.
go back to reference Solovyev, R.A., Kalinin, A.A., Kustov, A.G., Telpukhov, D.V., Ruhlov, V.S.: FPGA Implementation of Convolutional Neural Networks with Fixed-Point Calculations (2018). arXiv: 1808.09945 [cs.CV] Solovyev, R.A., Kalinin, A.A., Kustov, A.G., Telpukhov, D.V., Ruhlov, V.S.: FPGA Implementation of Convolutional Neural Networks with Fixed-Point Calculations (2018). arXiv:​ 1808.​09945 [cs.CV]
25.
go back to reference Venieris, S.I., Kouris, A., Bouganis, C.-S.: Toolflows for mapping convolutional neural networks on FPGAs: a survey and future directions (2018). arXiv: 1803.05900 [cs.CV] Venieris, S.I., Kouris, A., Bouganis, C.-S.: Toolflows for mapping convolutional neural networks on FPGAs: a survey and future directions (2018). arXiv:​ 1803.​05900 [cs.CV]
26.
go back to reference Wang, E., Davis, J.J., Cheung, P.Y.K.: A PYNQ-based framework for rapid CNN prototyping. In: 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2018, p. 223 (2018) Wang, E., Davis, J.J., Cheung, P.Y.K.: A PYNQ-based framework for rapid CNN prototyping. In: 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2018, p. 223 (2018)
27.
go back to reference Ma, Y., Suda, N., Cao, Y., Seo, J., Vrudhula, S.: Scalable and modularized RTL compilation of Convolutional Neural Networks onto FPGA. In: 2016 26th International Conference on Field Programmable Logic and Applications (FPL), August 2016, pp. 1–8 (2016) Ma, Y., Suda, N., Cao, Y., Seo, J., Vrudhula, S.: Scalable and modularized RTL compilation of Convolutional Neural Networks onto FPGA. In: 2016 26th International Conference on Field Programmable Logic and Applications (FPL), August 2016, pp. 1–8 (2016)
28.
go back to reference Zaheer, R., Shaziya, H.: GPU-based empirical evaluation of activation functions in convolutional neural networks. In: 2018 2nd International Conference on Inventive Systems and Control (ICISC), January 2018, pp. 769–773 (2018) Zaheer, R., Shaziya, H.: GPU-based empirical evaluation of activation functions in convolutional neural networks. In: 2018 2nd International Conference on Inventive Systems and Control (ICISC), January 2018, pp. 769–773 (2018)
Metadata
Title
A Modular Software Library for Effective High Level Synthesis of Convolutional Neural Networks
Authors
Hector Gerardo Munoz Hernandez
Safdar Mahmood
Marcelo Brandalero
Michael Hübner
Copyright Year
2020
DOI
https://doi.org/10.1007/978-3-030-44534-8_16