A Novel Current Mode Approximate Multiplier Scheme Based on 4:2 and 5:2 Compressors with Low Power Consumption and High Speed in CNTFET Technology

Recent developments in multiplication circuits with fewer transistors, higher speed, and reduced energy consumption are lowering hardware costs. Approximate multiplication is used for fault-tolerant applications, such as image and signal processing. These applications offer considerable improvement at the cost of reduced accuracy. Compressors are the main component of any multiplier structure. In this work, the design of an approximate multiplier based on current mode, using 4:2 and 5:2 approximate compressors and current over scaling technique is suggested to reduce power consumption, delay, and hardware components compared to existing architectures. In the proposed approach for the design of compressor circuits, current mode binary converters with 32 nm CNTFET technology are used. This work is done in three steps: (1) converting input currents into voltage and creating multi-level voltages. (2) Implementing voltage level detector. (3) Generation of output current based on threshold voltage. The proposed technique uses less number of transistors. The simulation was done under HSPICE software and the efficiency of the compressors was compared in terms of delay, power, and power delay product (PDP). Based on the simulation results, the PDP value for 4:2 and 5:2 compressor circuits is calculated as 0.0097 and 0.0131 fJ, respectively. Then, an approximate multiplication of 8 × 8 using these compressors is designed for multiplying images under MATLAB software. This multiplier has achieved a good improvement in terms of PSNR and MSSIM (respectively 9.14 and 2.85%) compared to advanced approximate multipliers. Also, the proposed approach performs better in terms of accuracy, power consumption, and delay.