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A Scalable FPGA Accelerator for Convolutional Neural Networks Read chapter Read first chapter

2018 | OriginalPaper | Chapter

A Post-link Prefetching Based on Event Sampling

Authors : Hongmei Wei, Fei Wang, Zhongsheng Li

Published in: Advanced Computer Architecture

Publisher: Springer Singapore

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Abstract

Data prefetching is an effective approach to improve performance by hiding long memory latency. Existing profiling feedback optimizations can do well in pointer-based linked data structure prefetching. However, these optimizations, which instrument and optimize source code during compiling or post link, usually incur tremendous overhead at profiling stage. Furthermore, it is a mission impossible for these methods to do optimization without source code. This work designs and implements an Event Sampling based Prefetching Optimizer, which is a post-link prefetching based on hardware performance counters event sampling. Evaluation on SW26010 processor shows that with the proposed prefetching approach, 9 out of 29 programs of SPEC2006 can be speeded up by about 4.3% on average with only less than 10% sampling overhead on average.

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Metadata
Title
A Post-link Prefetching Based on Event Sampling
Authors
Hongmei Wei
Fei Wang
Zhongsheng Li
Copyright Year
2018
Publisher
Springer Singapore
Book
Advanced Computer Architecture

Print ISBN: 978-981-13-2422-2

Electronic ISBN: 978-981-13-2423-9

Copyright Year: 2018

DOI
https://doi.org/10.1007/978-981-13-2423-9_5