7. Approximate Logic Synthesis Using Boolean Matrix Factorization

In this chapter, a new approximate circuit synthesis paradigm is presented, where approximations are introduced to the input circuit using Boolean matrix factorization (BMF). For a given multi-input, multi-output circuit, we first build its truth table and then approximate the truth table using BMF in a controllable fashion. The results of the BMF factorization are then used to synthesize the final approximate circuit. To scale our technique to large circuits, we devise a circuit decomposition method that breaks the circuit into manageable subcircuits. Furthermore, to effectively explore the design space of subcircuit approximations, a design space exploration technique is presented. Our approach offers a wide range of fine-grain trade-offs between accuracy and design complexity, i.e., design area and total power. We demonstrate that the proposed methodology can achieve large savings in power and area with small reductions in accuracy.