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04-01-2024

Arrangement rule of stability regions and single-electron transfer in common-gate quadruple-dot devices for the real ratio of gate capacitances

Authors: Shigeru Imai, Yusuke Watanabe

Published in: Journal of Computational Electronics | Issue 1/2024

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Abstract

For single-electron transfer in common-gate multidot devices, the arrangement of stability regions along the gate voltage (Vg) axis is important because single-electron transfer occurs around the overlap of stability regions. The stability regions along the Vg axis are well known to have periodicity when the device has an integer ratio of gate capacitances (Cg). However, the arrangement rule for the real Cg ratio is unclear. In this paper, stability regions for quadruple-dot devices with symmetric Cg are exhaustively examined. The arrangement of stability regions along the Vg axis is drawn as a map of the real Cg ratio in a newly proposed diagram. Here, the arrangement for a particular Cg ratio is drawn along a straight line that passes through the origin and has a slope depending on the Cg ratio. In the diagram, stability regions are arranged two-dimensionally, and the abovementioned periodicity for integer Cg ratios clearly appears. How neighboring stability regions interrelate with each other in the diagram is mathematically examined and described in detail. Next, the sequences of tunneling events around the overlap of stability regions are investigated, and eight kinds of tunneling sequences for single-electron transfer are determined.

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Appendix
Available only for authorised users
Footnotes
1
Energies such as the charging energy and thermal energy can also be normalized by a standard energy e2/Cgt. The thermal effect on CB is unchanged if the temperature and Cgt are changed such that the normalized thermal energy E’th is kept constant, that is, the thermal energy Eth is inversely proportional to Cgt.
 
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Metadata
Title
Arrangement rule of stability regions and single-electron transfer in common-gate quadruple-dot devices for the real ratio of gate capacitances
Authors
Shigeru Imai
Yusuke Watanabe
Publication date
04-01-2024
Publisher
Springer US
Published in
Journal of Computational Electronics / Issue 1/2024
Print ISSN: 1569-8025
Electronic ISSN: 1572-8137
DOI
https://doi.org/10.1007/s10825-023-02119-4