2023 | OriginalPaper | Chapter
Building a Pipelined RISC-V Processor
Author : Bernard Goossens
Published in: Guide to Computer Processor Architecture
Publisher: Springer International Publishing
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This chapter will make you build your second RISC-V processor. The implemented microarchitecture proposed in this second version is pipelined. Within a single processor cycle, the updated processor fetches and decodes instruction i, executes instruction i-1, accesses memory for instruction i-2 and writes a result back for instruction i-3.