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About this book

This book focuses on the architecture and circuit design for cognitive radio receiver front-ends. The authors first provide a holistic explanation of RF circuits for cognitive radio systems. This is followed by an in-depth exploration of existing techniques that can be utilized by circuit designers. Coverage also includes novel circuit techniques and architectures that can be invaluable for designers for cognitive radio systems.

Table of Contents

Frontmatter

1. Introduction

Abstract
Wireless technology has been evolving at a breakneck speed. The total number of cell-phones in use (as of 2011) was over 6 billion for a 7 billion world population (Wikipedia, World cell phone usage) constituting 87 % of the world population. Additionally, with user convenience becoming paramount, more and more functions are being implemented wirelessly. For example, the U.S. army utilizes 40 different types of radios for its communications. Moreover, there is a considerable effort toward integrating all this wireless functionality in a single device. Smartphones today use as many as a dozen independent radios inside them.
Bodhisatwa Sadhu, Ramesh Harjani

2. Cognitive Radio Architectures

Abstract
The system architecture for the SDR analog/RF is significantly different from that of traditional narrowband radio systems. In the original software radio proposal by Joseph Mitola in 1992 [8], he proposed an architecture where in the receiver,the RF bandwidth is digitized (no down-conversion), and signal analysis and demodulation is performed in the digital domain. Similarly, in the transmitter, the RF signal is synthesized in the digital domain, converted to analog and transmitted. The conceptual transceiver architecture is shown in Fig. 2.1. The Mitola architecture provides the maximum amount of flexibility through an increase in software capability. However, this architecture imposes impractical requirements on the analog-to-digital and digital-to-analog converters necessary for this architecture. For example, as discussed in [9], a 12 GHz, 12-bit ADC that might be used in a Mitola receiver would dissipate 500W of power! As a result, the ideal goal of communication at any desirable frequency, bandwidth, modulation and data rate by simply invoking the appropriate software remains far from realizable.
Bodhisatwa Sadhu, Ramesh Harjani

3. Wideband Voltage Controlled Oscillator

Abstract
In this chapter, we explore techniques to increase the tuning-range of VCOs while maintaining adequate phase noise and power dissipation performance over the tuning range. Two popular oscillator architectures: LC tank based, and ring based, are considered for SDR signaling and spectrum scanning applications. Of these, LC tank VCOs are traditionally well suited for their superior phase noise and low power consumption at radio frequencies, and are therefore the preferred choice. However, LC tank VCOs are notorious for their lower tuning range as compared to ring oscillators. In this work, we select the LC tank oscillator and devise a scheme based on switched inductors, and capacitor array optimization, to extend the desirable power and phase noise properties of LC VCOs over a wide tuning range for use in SDR signaling (and sensing) applications.
Bodhisatwa Sadhu, Ramesh Harjani

4. RF Sampling and Signal Processing

Abstract
As seen in Fig. 2.​12 in Chap. 2, this spectrum sensing architecture uses an RF sampler followed by discrete time signal processing in the analog domain. Specifically, passive charge domain computations are utilized for signal processing followed by digitization. For RF sampled processors, the RF sampler has historically remained a substantial bottle-neck. However, with technology scaling and subsequent improvement in switch performance, RF sampling has become a possibility in modern silicon processes.
Bodhisatwa Sadhu, Ramesh Harjani

5. CRAFT: Charge Re-use Analog Fourier Transform

Abstract
Conventional software defined radios (SDR) (Mitola, Software radios–survey, critical evaluation and future directions, in Telesystems Conference 1992) strive to digitize the RF signal and perform spectrum sensing in the digital domain. However, for wideband inputs, this translates to infeasible ADC specifications (Abidi, IEEE Journal of Solid-State Circuits, 2007). Time interleaving (O’Donnel and Brodersen, IEEE Transactions on Vehicular Technology, 2005) and N-path filter-banks (Valezquez et al., Proceedings of the IEEE-SP International Symposium on Time-Frequency and Time-Scale Analysis, 1994; Namgoong, IEEE Transactions for Wireless Communications, 2003) have been proposed to tackle instantaneous wideband digitization. However, while time interleaving the ADCs reduces their speed, the input dynamic range (exponentially related to ADC power) remains large.
Bodhisatwa Sadhu, Ramesh Harjani

6. Conclusions

Abstract
The realization of the alluring vision of a cognitive radio requires novel and disruptive RF circuit architectures, and innovative circuits. This has motivated a deluge of exciting research in this area in the past decade, and will continue to spur further research into the next. At this time, a highly reconfigurable RF architecture seems feasible by employing new wideband circuits that have recently been developed. However, the realization of the ideal cognitive radio, with the level of versatility described by early descriptions (Mitola, Cognitive radio: an integrated agent architecture for software defined radio dissertation, 2000), requires further innovation, probably spanning the next decade.
Bodhisatwa Sadhu, Ramesh Harjani

Backmatter

Additional information