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2020 | OriginalPaper | Chapter

Combined State Splitting and Merging for Implementation of Fast Finite State Machines in FPGA

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Abstract

A new method of the synthesis of finite state machines is proposed. In this method, the speed of FSM is taken into account already at the early stage of synthesis process. The method is based on sequential merging and splitting two internal states regarding to speed of FSM. This parameter may decrease with reduction of internal states, but splitting internal states leads to decrease of number of variables in logic functions which describe combinational part of FSM. This parameter has a great influence on a critical delay path. The results of experiments showing efficiency of proposed approach are also presented.

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Metadata
Title
Combined State Splitting and Merging for Implementation of Fast Finite State Machines in FPGA
Author
Adam Klimowicz
Copyright Year
2020
DOI
https://doi.org/10.1007/978-3-030-47679-3_6

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