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5. Delayed Switched Cascode Doherty Class-E PA

  • 2022
  • OriginalPaper
  • Chapter
Published in:
Authors
Nourhan Elsayed
Hani Saleh
Baker Mohammad
Mohammed Ismail
Mihai Sanduleanu
Published in
High Efficiency Power Amplifier Design for 28 GHz 5G Transmitters
Publisher
Springer International Publishing

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Abstract

The chapter introduces a 28 GHz Class-E based Doherty Power Amplifier (DPA) implemented in 22nm FDSOI technology. The design employs an on-chip active balun and a variable gain amplifier (VGA) to achieve a 17 dB gain and 17.5 dBm saturated output power. The auxiliary amplifier, a Class-E PA, operates in two modes: constant bias and switched mode. The constant bias mode achieves a peak PAE of 28% and 25% at 6-dB back-off, while the switched mode improves this to 32% and 31% respectively. The chapter highlights the superior performance of the switched mode DPA, with a significant reduction in efficiency drop from peak to back-off, and a high figure of merit (FoM) compared to existing state-of-the-art CMOS DPAs. The design and simulation results are validated through extensive measurements, showcasing the potential of the proposed DPA for high-efficiency, high-output power applications in modern communication systems.
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previous chapter Delayed Switched Cascode Class-E Amplifier
next chapter A 28 GHz Inverse Class-D Power Amplifier
Title
Delayed Switched Cascode Doherty Class-E PA
Authors
Nourhan Elsayed
Hani Saleh
Baker Mohammad
Mohammed Ismail
Mihai Sanduleanu
Copyright Year
2022
Book
High Efficiency Power Amplifier Design for 28 GHz 5G Transmitters

Print ISBN: 978-3-030-92745-5

Electronic ISBN: 978-3-030-92746-2

Copyright Year: 2022

DOI
https://doi.org/10.1007/978-3-030-92746-2_5
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