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2017 | OriginalPaper | Chapter

9. Design Methodologies for IoT Systems on a Chip

Authors : David Flynn, James Myers, Seng Toh

Published in: Enabling the Internet of Things

Publisher: Springer International Publishing

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Abstract

This chapter addresses the approaches and methodologies appropriate to energy-constrained SoC design, implementation and verification using standard multi-voltage Electronic Design Automation tools, rather than resorting to full-custom circuit approaches. The Physical-IP libraries, memories and power-management components required to address both active-mode energy and deep-sleep state retention power are introduced, followed by a case study addressing the specific challenges of optimizing a micro-processor subsystem for Near- and Sub-Threshold Voltage operation. As well as system level power management the implementation and verification of clock distribution and system timing closure are covered in detail.

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Metadata
Title
Design Methodologies for IoT Systems on a Chip
Authors
David Flynn
James Myers
Seng Toh
Copyright Year
2017
DOI
https://doi.org/10.1007/978-3-319-51482-6_9