2007 | OriginalPaper | Chapter
Device Design and Scalability of an Impact Ionization MOS Transistor with an Elevated Impact Ionization Region
Authors : Eng-Huat Toh, Grace Huiqi Wang, Lap Chan, Ganesh Samudra, Yee-Chia Yeo
Published in: Simulation of Semiconductor Processes and Devices 2007
Publisher: Springer Vienna
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This paper reports a novel L-shaped Impact-ionization MOS (LI-MOS) transistor structure that achieves a subthreshold swing of well below 60 mV/decade at room temperature and operates at a low supply voltage. The device features an L-shaped or elevated Impact-ionization region (I-region) which displaces the hot carrier activity away from the gate dielectric region to improve hot carrier reliability and
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stability problems. Device physics and design principles for the LI-MOS transistor are detailed through extensive two-dimensional device simulations. The LI-MOS transistor exhibits excellent scalability, making it suitable for augmenting the performance of standard CMOS transistors in future technology generations.