2. Embedded Software Debug in Simulation and Emulation Environments for Interface IP

This chapter presents an overview of different embedded software debug techniques enabled by recent advances in the EDA tools allowing either interactive or playback type debug of software and hardware (RTL) in a simulation of a complete system. Most of the methods and ideas described here present a summary of different approaches applied within our day-to-day work at Cadence\({\textregistered }\) Design Systems. With growing complexity of software and hardware solutions and an increasing push at reducing the time-to-market, it has become very important to simulate or run as much of the target system and software, as early as possible in order to enable system-level validation of the complete design and evaluation of any potential risks or limitations, that may not be obvious at unit level (e.g., considering the CPU and each piece of hardware IP in isolation). New SoC systems bring increasing integration level of both software and hardware elements and the final product requires all of the components to interact as designed, in order to satisfy the growing user expectations for speed, efficiency, and reliability. Furthermore software complexity in the embedded systems has recently exploded as more functionality is driven by microcontrollers with reprogrammable firmware allowing addition of features to products after release.