Event-Driven Circuit Architectures for Scalable and Adaptive Sensor Readout

Table of Contents

1. Frontmatter

2. Chapter 1. Introduction

   Jonah Van Assche, Georges Gielen

   Abstract

   Sensors have become ubiquitous in the daily life of humans and are used in various use cases, ranging from smart home assistants to smartphones and fitness trackers. In all these applications, information such as sound, vision, health status, etc. is transformed from an initial analog signal into digital data, which can be processed by algorithms, leading to insights and/or actions. In this introductory chapter, the position of sensors in today’s global IT and electronic infrastructure and their challenges will be sketched, and some background regarding sensors and their electronic interfaces will be given.

3. Chapter 2. Literature Review

   Jonah Van Assche, Georges Gielen

   Abstract

   The previous chapter gave a broad overview of the field of wireless connected sensors, operating at the edge of the IoT, with a focus on sensing devices for biomedical applications. This chapter will provide the reader with a system-level insight in a typical biomedical sensor system. In Sects. 2.1 to 2.6, the most important building blocks of a biomedical recording system will be revised, from the electrodes to the transmitter. In Sect. 2.7, a small case study of a wearable will be discussed. In Sect. 2.8 several data processing techniques will be discussed, both in the digital and in the mixed-signal domain.

4. Chapter 3. Performance Evaluation of Level-Crossing ADCs

   Jonah Van Assche, Georges Gielen

   Abstract

   The previous chapter introduced various techniques to reduce the amount of data transmission and, hence, the power consumption in edge sensing applications. Performing processing in the digital domain can lead to a significant data reduction, at the cost of a higher power consumption of the digital circuits. As an alternative, event-driven level-crossing ADCs can be used. Such ADCs exploit the properties of signals such as the electrocardiogram or action potentials by only sampling once these signals show activity. This chapter will explore the use of level-crossing ADCs for biomedical applications and will provide an in-depth comparison of such ADCs with standard Nyquist-rate ADCs.

5. Chapter 4. A 10.4-ENOB Level-Crossing ADC with Adaptive Clocking Strategy

   Jonah Van Assche, Georges Gielen

   Abstract

   The previous chapter analyzed the standard level-crossing analog-to-digital converter (LCADC) architecture and found that the topology can offer a significant system-level advantage over classical digital compression. However, at the ADC level, the power consumption of the continuous-time (CT) comparator limits the LCADC power efficiency for higher quantizer resolutions (\({>}7\) bits). Moreover, once a timer circuit is required to synchronize the asynchronous LCADC output—which is required for applications that have to work in a synchronous fashion—the LCADC power efficiency is further degraded. The timer also increases the output data rate of the LCADC, undoing part of the system-level benefits. To address all these shortcomings, this chapter will present an LCADC topology that uses an adaptive clocking strategy. It overcomes the limitations of previous asynchronous LCADCs by using power-efficient and highly accurate clocked comparators, an on-chip clock generator to generate multiple sample clocks for the ADC to enable adaptive clocking and event logic that dynamically adjusts the instantaneous sample clock of the ADC to the signal activity, limiting the power waste.

6. Chapter 5. FREYA: An Event-Driven SoC for Spiking End-to-End Classification

   Jonah Van Assche, Georges Gielen

   Abstract

   This chapter builds further on the level-crossing analog-to-digital converter (LCADC) from the previous chapter. The discrete-time (DT) LCADC introduced in Chap. 4 showed a good power efficiency. Furthermore, the synchronous but event-driven nature allows the LCADC to be multiplexed, which is typically not possible with regular asynchronous LCADCs. To extend the advantage of LCADCs also to the processing part of a system, they can be integrated together with spiking neural networks (SNNs). The event-driven output of LCADCs can be used as the spike train input of SNNs, on which they can perform signal classification.

   This chapter will present the design of an event-driven system-on-chip (SoC), called FREYA. FREYA uses the LCADC as a multichannel analog-to-spike converter (ASC) that provides an input to an on-chip SNN processor that can perform signal classification. As target application, multichannel electrocardiogram (ECG) readout and classification has been chosen.

7. Chapter 6. Conclusions

   Jonah Van Assche, Georges Gielen

   Abstract

   To enable future healthcare applications such as the early detection of heart conditions, closed-loop epilepsy treatment, etc., there is a need to have continuous monitoring (and processing) of vital signs such as the electrocardiogram (ECG) and electroencephalogram (EEG) signals. To enable such applications, low-power sensing devices with wireless connection to the cloud and potentially on-chip processing are required. These edge devices need to operate for long periods of time on a small battery and consume most of their power in data transmission.

8. Backmatter