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1992 | OriginalPaper | Chapter

Exploiting Parallelism in Hardware Implementation of the DES

Authors : Albert G. Broscius, Jonathan M. Smith

Published in: Advances in Cryptology — CRYPTO ’91

Publisher: Springer Berlin Heidelberg

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The Data Encryption Standard algorithm has features which may be used to advantage in parallelizing an implementation. The kernel of the algorithm, a single round, may be decomposed into several parallel computations resulting in a structure with minimal delay. These rounds may also be computed in a pipelined parallel structure for operations modes which do not require cryptext feedback. Finally, system I/O may be performed in parallel with the encryption computation for further gain. Although several of these ideas have been discussed before separately, the composite presentation is novel.

Metadata
Title
Exploiting Parallelism in Hardware Implementation of the DES
Authors
Albert G. Broscius
Jonathan M. Smith
Copyright Year
1992
Publisher
Springer Berlin Heidelberg
DOI
https://doi.org/10.1007/3-540-46766-1_30

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