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2021 | OriginalPaper | Chapter
Finite State Machine Realization of IIR Digital Filters
Author : Yanzhong Zhang
Published in: Footprints in Cambridge and Aviation Industries of China
Publisher: Springer Singapore
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A method is proposed for representing an IIR digital filter as a Finite State Machine (FSM). This representation only has a maximum error of 1/2 bit from the final result of infinite accuracy arithmetic, and has not any increase in errors during the processing period. The realization avoids the effects of coefficient quantization and multiplication arithmetic errors caused by finite word length on the performance of DSP system. A graph theory method is presented for removing the oscillations from the system with a minimal increase in noise and without any increase in complexity of systems.