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Published in:
2016 | OriginalPaper | Chapter
Floating Point Multiple Constant Multiplication
Author : Martin Kumm
Published in: Multiple Constant Multiplication Optimizations for Field Programmable Gate Arrays
Publisher: Springer Fachmedien Wiesbaden
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It was shown in the previous chapter that the hardware complexity of the mantissa multiplier block can be reduced by sharing intermediate results. This chapter deals with the remaining architecture to perform a floating point MCM operation, namely the exponent computation, normalization, rounding and the treatment of special values. This architecture with parts of the last chapter was originally published in [165].