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2025 | OriginalPaper | Chapter

High-Speed Congestion Aware Routing Algorithm for Network on Chip Architecture

Authors : Bellala Navyasri, Sankurathri Shreyaswi, Veerendra Sai Manasali, M. Vinodhini

Published in: Advances in Communication, Devices and Networking

Publisher: Springer Nature Singapore

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Abstract

Network on Chip (NoC) performance degradation is significantly impacted by network congestion. Routers using adaptive algorithms, which are capable of detecting traffic congestion, can enable NoC to support complex and dynamic applications. Additionally, there is a growing need in NoC for routing algorithms that can be modified to provide minimal paths and congestion monitoring. The proposed high-speed odd-even congestion-aware routing algorithm for NoC architecture is based on the odd-even turn model and regional congestion awareness. In terms of delay and throughput, the suggested technique performs better than the current algorithm.

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Doraisamy R, Moharir M, Arul R (2022) Congestion aware and game based odd even adaptive routing in network on chip many-core architecture. Indonesian J Electr Eng Comput Sci 28(2):962–972. ISSN 2502-4752. https://doi.org/10.11591/ijeecs.v28.i2.pp962-972

Kathirvel S, Thakyal D, Nambiar S, Lakshminarayanan G, Ko S-B (2014) Enhanced Noxim simulator for performance evaluation of network on chip topologies. In: 2014 recent advances in engineering and computational sciences, RAECS 2014. https://doi.org/10.1109/RAECS.2014.6799570

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Marri J, Manishankar S, Radha D, Moharir M (2019) Implementation and analysis of adaptive odd-even routing in Booksim 2.0 simulator. In: 2019 international conference on communication and electronics systems (ICCES), Coimbatore, India, pp 76–83. https://doi.org/10.1109/ICCES45898.2019.9002391

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Somisetty R, Karthik VSS, Srujan MRS, Vinodhini M (2021) Regional congestion aware odd even routing with fair arbitration for network on chip. In: 2021 fourth international conference on electrical, computer and communication technologies (ICECCT), Erode, India, pp 1–6. https://doi.org/10.1109/ICECCT52121.2021.9616741

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Somisetty R, Karthik VSS, Srujan MRS, Vinodhini M (2022) Congestion aware negative first routing with fair arbitration for network on chip. In: 2022 6th international conference on computing methodologies and communication (ICCMC), Erode, India, pp 215–220. https://doi.org/10.1109/ICCMC53470.2022.9753862

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Vazifedunn S, Reza A, Reshadi M (2023) Low-cost regional-based congestion-aware routing algorithm for 2D mesh NoC. Int J Commun Syst, e5360

Title: High-Speed Congestion Aware Routing Algorithm for Network on Chip Architecture
Authors: Bellala Navyasri
Sankurathri Shreyaswi
Veerendra Sai Manasali
M. Vinodhini
Publisher: Springer Nature Singapore
Book: Advances in Communication, Devices and Networking
Print ISBN: 978-981-9764-64-8

Electronic ISBN: 978-981-9764-65-5

Copyright Year: 2025
DOI: https://doi.org/10.1007/978-981-97-6465-5_1

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