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2019 | OriginalPaper | Chapter

8. Idempotent Instructions to Counter Fault Analysis Attacks

Authors : Sikhar Patranabis, Debdeep Mukhopadhyay

Published in: Automated Methods in Cryptographic Fault Analysis

Publisher: Springer International Publishing

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Abstract

In this chapter, we present an exposition to countermeasures against fault analysis via instruction-level redundancy in software. The presence of redundant instructions protects a software implementation against what are called “instruction-skip” attacks, wherein an adversary targeting a software-based crypto-implementation (e.g., on platform such as micro-controllers) might skip one or more instructions to leak secret information. The idea is to convert an instruction sequence that performs a specific task into a functionally equivalent sequence that is tolerant to skipping of a certain (pre-determined) number of instructions. In this context, we introduce the reader to “idempotent” instructions, which are instructions that may be duplicated without affecting the eventual outcome of the overall program. However, not all instructions may be simply duplicated; we show some non-trivial conversions of simple non-idempotent instructions into sequences of idempotent instructions that can then be made redundant via duplication. Finally, we discuss how to automate the process of compiling any program into a fault-tolerant sequence of assembly instructions via a case study on a modified LLVM compiler.

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previous chapter Automated Deployment of Software Encoding Countermeasure

next chapter Differential Fault Attack Resistant Hardware Design Automation

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Title: Idempotent Instructions to Counter Fault Analysis Attacks
Authors: Sikhar Patranabis
Debdeep Mukhopadhyay
Publisher: Springer International Publishing
Book: Automated Methods in Cryptographic Fault Analysis
Print ISBN: 978-3-030-11332-2

Electronic ISBN: 978-3-030-11333-9

Copyright Year: 2019
DOI: https://doi.org/10.1007/978-3-030-11333-9_8