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Journal of Computational Electronics

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01-02-2025

Implications of side contact depth on the Schottky barrier of 2D field-effect transistors

Authors: L. Panarella, Q. Smets, D. Verreck, B. Kaczer, S. Tyaginov, C. Lockhart de la Rosa, G. S. Kar, V. Afanas’ev

Published in: Journal of Computational Electronics | Issue 1/2025

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Abstract

The performance of 2D material-based field-effect transistors (2D FETs) is significantly influenced by the vertical extension, or depth, of electrostatically doped side Schottky contacts, which is determined through etching. This study employs TCAD modeling to compare back-gated FETs with varying source/drain contact depths and channel lengths. Results indicate that deeper side contacts hinder electric field crowding at the metal/channel interface, resulting in wider Schottky barriers, diminished carrier tunneling, and reduced on-state current. In contrast, introducing a low-k dielectric beneath the source and drain yields the opposite effect. Therefore, in the development of industry-compatible 2D FETs, the depth and design of side contacts must be carefully optimized, as they are critical factors in achieving low-contact resistance devices.

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Title: Implications of side contact depth on the Schottky barrier of 2D field-effect transistors
Authors: L. Panarella
Q. Smets
D. Verreck
B. Kaczer
S. Tyaginov
C. Lockhart de la Rosa
G. S. Kar
V. Afanas’ev
Publication date: 01-02-2025
Publisher: Springer US
Published in: Journal of Computational Electronics / Issue 1/2025
Print ISSN: 1569-8025
Electronic ISSN: 1572-8137
DOI: https://doi.org/10.1007/s10825-024-02262-6

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Implications of side contact depth on the Schottky barrier of 2D field-effect transistors

Abstract

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Abstract

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Dont have a licence yet? Then find out more about our products and how to get one now:

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