Integrated Nanoelectronics

The fields of nanoscience and nanotechnology are introduced. The key terminology is defined. The reader is familiarized with the five fundamental interrelated nanodisciplines: nanoelectronics, nanomagnetics, nanophotonics, nanomechanics, and nanobiotechnology. Salient features of these disciplines are described. Three sub-domains of nanoelectronics known as more Moore, more-than-Moore, and beyond CMOS are explained. The association of different nanoscience disciplines with nanoelectronics is brought out. A synthetic treatment of these disciplines is stressed and the key idea of the book is elaborated.

The melange of definitions of nanomaterials is discussed. Terminology laid down by the International Organization for Standardization (ISO) and European Commission (EC) concerning nanomaterials is described. Ultrafine grained materials with grain size in nanoscale range show unusually higher mechanical strength than coarse-grained materials. Two vital characterizing parameters representing the degree of dominance of surface effects in materials are dispersion and coordination number. Due to predominance of surface effects, nanoparticles are efficient catalytic agents. Melting points of these particles are lower than those of the bulk material, and phase transitions are hazily defined. The onset of quantum size effect in nanomaterials depends on the dimension of the nanomaterial compared to exciton Bohr radius. Due to quantum confinement, the bandgap of a semiconductor nanocrystal is wider than that of the bulk semiconductor. Dependence of bandgap on nanocrystal size leads to emission of light of different wavelengths from these quantum dots. In metals, interaction of light with surface plasmons leads to resonance oscillations at particular frequencies, thereby producing different color effects. Notable magnetic properties of nanomaterials include the display of superparamagnetic behavior, the exhibition of magnetism in materials that are generally believed to be nonmagnetic, and the giant magnetoresistance effect.

The classical MOSFET serving as the main vehicle carrying integrated circuit technology forward with the help of its opposite polarity NMOS and PMOS devices combined into the well-known CMOS configuration has been constantly downscaled. Riding on the classical MOSFET workhorse, integrated circuits have steadily marched a long way towards the nanoscale. Constant field and constant voltage scaling schemes have been applied. The downscaling succeeded to a large extent in meeting the predictions of the Moore’s law before succumbing to physical limitations. Various problems encountered in moving towards smaller geometry devices are outlined and restrictions on downscaling supply and threshold voltages are laid down. The extent of solutions possible with classical MOSFET structure is indicated. Through such technological innovations, the classical MOSFET progressed unless it was realized that revolutionary process and structural improvements were necessary. The chapter surveys the scaling issues and looks at the solutions to the problems in the perspective of classical MOSFET device.

Short-channel effects are a series of phenomena that take place when the channel length of the MOSFET becomes approximately equal to the space charge regions of source and drain junctions with the substrate. They lead to a series of issues including polysilicon gate depletion effect, threshold voltage roll-off, drain-induced barrier lowering (DIBL), velocity saturation, reverse leakage current rise, mobility reduction, hot carrier effects, and similar other annoyances. Mitigation of the problem posed by polysilicon gate depletion effect via restoration of metal gate structure is presented. Threshold voltage reduction makes it difficult to turn the transistor off completely. By DIBL effect, electrostatic coupling between the source and drain makes the gate ineffective. Velocity saturation decreases the current drive. The leakage current increases the power dissipation. Enhanced surface scattering degrades the mobility of charge carriers affecting the output current. Apart from these factors, impact ionization and hot carrier effects seriously impair the MOSFET performance and cause the device to diverge in behavior from long-channel ones. Notable solutions are the gate oxide thickness cutback, use of high-κ dielectrics, strain engineering, etc. Nevertheless, the various effects mentioned severely downgrade the performance of planar CMOS transistors at process nodes <90 nm.

Continuing the onward advancement from where the classical MOSFET failed to meet the expectations of Moore’s law, it was widely accepted that novel MOSFET structures were direly needed in order that the pace of the progress is not slackened. It was also evident that short-channel effects could only be obviated if the gate action could be strengthened so that the channel region is always under the solitary control of the gate. The advent of silicon-on-insulator technology came as a breakthrough to rescue the CMOS engineers. First partially-depleted silicon-on-insulator (SOI) MOSFETs entered the market followed by the fully-depleted MOSFET devices. The fully-depleted MOSFETs represent a cornerstone of technological transformation leading to downscaling to lower levels.

The ever-increasing leakage current with every successive generation of MOSFET urged the researchers to look for a revolutionary change in device architecture. The changeover to SOI-MOSFET, particularly the FD-SOI-MOSFET, succeeded to a large extent in meeting the challenges without any fundamental modification of the structure. Alternative choices proposed were trigate FET and FINFET structures, which marked the end of planar era and entailed a radical change from a planar device to a three-dimensional shape for rejuvenating the IC industry. This chapter explains how wrapping the gate insulator around the body region of a MOSFET is an effective way of increasing the capability of the gate to mitigate the various encumbrances faced with short-channel devices. A comparative study of FINFETs fabricated on SOI wafers and bulk silicon wafers is presented. The neck-to-neck battle between FINFET and FD-SOI-MOSFET to clinch the supreme position is described by pointing out their relative beneficial aspects and downsides.

Two subbranches of nanophotonics are distinguished based on far-field propagating light and near-field non-propagating light. These subbranches are known as diffraction-limited and beyond-diffraction-limit nanophotonics, respectively; Japanese researcher Ohtsu proposed the later. Under the diffraction-limited nanophotonics fall plasmonics, photonic crystals, quantum dot lasers, and silicon nanophotonics. These utilize conventional light waves for transmission of signals. In the beyond-diffraction-limit nanophotonics, prototype AND and NOT gate arrangements are presented. These work on near-field energy transfer between quantum dots. They use optical near field for conveying signals. Fundamentally different criteria are to be evolved for designing nanophotonic devices exploiting conventional and near-field approaches. The near-field approach may render possible the development of novel photonic systems.

NEMS consist of electronic and nonelectronic components and functions on the nanoscale. These components and functions include sensing, actuation, signal acquisition, and processing. Sometimes display, control, interfacing, and ability to perform chemical and biochemical interactions are also included. NEMS follow both approaches: downscaling previous MEMs components to nanodimensions, and introducing new concepts based on phenomena that are exclusive to nano-regime. Limitations in downscaling are pointed out as well as novel sensing/actuation techniques are presented. NEMS play a critical role in medical diagnostics, displays, energy harvesting, nonvolatile memory, and providing ultra-sharp tips for atomic force microscopy.

A new generation of extra-ordinarily sensitive, fast-response devices utilizing the distinctive properties of nanomaterials or modulation of characteristics of nanoelectronic devices is described. Besides their ultrahigh sensitivities, these nanosensors exhibit much lower detection limits than their microscopic competitors. In these nanomaterials and nanosize sensing devices, the relevant analyte molecules bind with the functionalized surfaces of the concerned nanostructures, producing changes in the properties of materials or altering the characteristics of devices in accordance with the concentration of the target biomolecules. These molecular bindings constitute the basis for specificity in the detection of biological and chemical species. Perspectives of nanosensors based on gold nanoparticles, magnetic nanoparticles, quantum dots, carbon nanotubes, silicon nanowires, and nanocantilevers are sketched.

The field of spintronics is introduced and differentiated from magnetoelectronics. Augmentation of the capabilities of nanoelectronics by the addition of two spin degrees of freedom to the preexisting two charge degrees of freedom is explained. The spin degrees of freedom can also be used alone to create functional devices. The role of spintronics as a bridge between semiconductor ICs and magnetic storage is elucidated. The technologically recognized spintronic device working on giant magnetoresistance effect is compared with normal magnetoresistance. The operation of magnetic tunnel junction devices for providing high magnetoresistance ratios is described. Performance of MRAM is compared with SRAM, DRAM and flash memory devices. Besides fast access, the capability of spin transfer torque RAM to decrease the write current in comparison to MRAM is indicated. The main application areas of spintronics in computer hard disks and magnetic random access memory devices are highlighted.

The concept of quantum mechanical tunneling is introduced. Degenerate and nondegenerate semiconductors are defined and distinguished. Possibility of carrier tunneling across extremely thin depletion regions is explained. Operation of a tunnel diode is described in terms of its energy band diagram. Current flow through the diode increases/decreases according to the availability/unavailability of vacant energy states in the valence band of the P-side that are aligned with respect to electron energy states on the N-side. Worthy of notice is the occurrence of negative resistance region in the current–voltage characteristic of a tunnel diode. The origin of such anomalous region is interpreted. The probability of resonant tunneling through a double barrier heterostructure is put in plain words on basis of the wave nature of electron. Acquisition of understanding of tunnel diode operation helps to bring out the dissimilarity between a tunnel diode and a resonant tunnel diode. Advantages, limitations and applications of resonant tunnel diodes in digital logic circuits and other areas are elaborated. The tunnel FET is proposed as an alternative to MOSFET. It is based on band-to-band tunneling for injection of carriers. It is a steep-slope switch offering the possibility of a subthreshold slope <60 mV/decade. This value is restricted in MOSFETs due to the tail of the Fermi distribution. Tunnel FETs cater to the very low power applications. They can operate at low voltages V _DS < 0.5 V. At such low voltages, CMOS performance is considerably worsened, which is a favorable aspect of tunnel FETs.

Conceptual development regarding single electron transfer phenomena is presented. It is shown that energy necessary to place a single electronic charge on one plate of a capacitor with equal opposite charge on its opposite plate is not a clearly distinguishable event at micro- and milliscales. But it becomes a meaningful event at the nanoscale due to the significant amount of energy involved. Further, it is shown that the existence of a voltage requirement for tunneling to occur across the plates of a capacitor, the so-called Coulomb blockade effect, is a noticeable phenomenon exclusive to nanoscale. Moving further, it is found that the Coulomb blockade is observable at or near room temperatures only in the scale of nano dimensions. From this understanding, the notion of a tunnel junction is put forward as a barrier in the form of an electrical potential or thin dielectric film across which tunneling occurs. The tunnel junction is modeled as an ideal capacitor with a parallel-connected tunnel resistance whose value must be ≫4.2 kΩ for Coulomb blockade to become recognizable. The capacitor of the tunnel junction behaves in a different way from a normal capacitor. Upon excitation by a constant current source, the voltage across this capacitor oscillates between two values, which are referred to as single electron tunneling oscillations. Applying the tunnel junction model, the operation of a quantum dot circuit consisting of a quantum dot and two tunnel junctions is analyzed. In both cases, for electron tunneling into the quantum dot across one tunnel junction and for electron tunneling off the quantum dot across the other tunnel junction, Coulomb blockade occurs in a quantum dot circuit like a nanocapacitor. The energy band diagram for a small quantum dot circuit exhibits a discretized nature. The electron tunneling does not take place in a continuous fashion but in discrete voltage steps. The resulting current–voltage characteristic of the quantum dot circuit has the shape of a staircase which is called the Coulomb staircase.

Operational principle of single electron transistor is outlined. Based on energy band diagram, the influence of the gate voltage on the drain-source voltage for tunneling from source to drain is expounded. Derivation of the equation for total energy stored in the capacitors comprising a single electron transistor is presented. From energy viewpoint, necessary conditions favoring electron tunneling are deduced. These electron tunneling processes take place from one tunnel junction into the quantum dot island, and thereafter from this island across the other tunnel junction. Considering opposite sequences of operation of electron tunneling across tunnel junctions into and away from the quantum dot island, symmetrically placed triangular regions are sketched and combined to show Coulomb diamonds. Logic circuit operation based on single electron transistors is introduced. The reader is familiarized with voltage-based logic and charge-based logic used with SETs. Restrictions on increasing the low voltage gain of SETs are discussed. Elimination of the requirement of separately fabricating complementary SETs is both an advantage and a disadvantage. Difficulties faced in straightway adoption of CMOS logic circuits for SET logic are indicated. Operation of voltage-logic-based SET AND, NOT, and OR gates is described. Other applications of SETs as a supersensitive electrometer, as a standard of direct current and for IR detection are briefly touched upon.

Bottom-up approach to nanowire synthesis using vapour-liquid-solid technique is outlined. Pros and cons of this approach with top-down paradigms are highlighted. Using silicon nanowires, the fabrication of P-N junction diodes, bipolar and field-effect transistors as well as complementary inverters is described. Fabrication and operation of P-channel Ge/Si heterostructure and N-channel GaN/AlN/AlGaN heterostructure nanowire transistors is discussed. Placement of nanowires at desired locations and their interconnections to form logic circuits is addressed. Cross-bar architecture is an accepted structure, which has rendered possible the gainful utilization of the unique properties of nanowires. The nanowires can act as versatile building blocks for the assembly of nanoelectronic circuits.

Carbon nanotubes serve as ideal one-dimensional materials for nanoscale electronic circuitry, not only because of their small size but also due to their overall exceptional properties, providing the necessary mechanical and chemical stability to the devices. Amongst the three main processes developed for CNT growth, namely arc discharge, laser ablation and chemical vapor deposition, the last one stands out prominently for its adaptability to nanoelectronics manufacturing. A noteworthy feature of fabrication of CNT devices is that the process is doping-free. Instead of doping, the polarity of the FETs is determined by the metals used as contacting electrodes. By appropriate choice of metals, P-channel, N-channel and complementary symmetry CNT FETs are realized. Elimination of the doping requirement for fabrication of CNT devices makes them invulnerable to dopant-related fluctuations. Semiconducting CNTs form the basis of transistor circuits whereas metallic CNTs are used as interconnects. Self-aligned process for large-scale fabrication of P-channel, N-channel and complementary CNT configurations paves the way towards adoption of CNT technology for bulk production.

The ultrahigh room-temperature carrier mobility in graphene makes it very useful for microwave and high-frequency devices. Additionally, high current-carrying capability >10⁸ A/cm² together with high thermal conductivity ~2000–4000 Wm⁻¹K⁻¹ for freely suspended graphene and ~600 Wm⁻¹K⁻¹ for SiO₂-supported graphene establish its superiority among nanoelectronic materials. Graphene flakes are easily isolated from graphite by mechanical exfoliation. Graphene can be grown on metal films and transferred to desired substrates. It can be grown epitaxially on silicon carbide. Graphene sheets can also be synthesized by a substrate-free process in the gas phase. Planarity of graphene makes widely practiced planar processes of semiconductor industry applicable to graphene. On the downside, the bandgap of graphene is zero. Hence, graphene transistors cannot be switched off effectively. However, single-layer graphene transistors show excellent performance in GHz analog circuits. By quantum confinement, a bandgap is opened in graphene when cut into nanoribbons. Bandgap is also created by applying a perpendicular electric field to bilayer graphene. However, carrier mobility in nanoribbons is lower than in large-area graphene. Present status of graphene nanoribbon and bilayer transistors is described. Although they display higher on-off current ratios than transistors fabricated on original graphene, intensive efforts are required to realize the full potentiality of graphene for nanoelectronics.

Transition metal dichalcogenides (TMDs) serve as a two-dimensional, layered-structure, semiconducting material option to the gapless graphene in which carrier mobility is degraded by present bandgap engineering methods, predominantly by edge scattering. The TMD family includes compounds made of a transition metal, commonly Mo, W, Nb, Ta, Ti with a chalcogen atom, e.g., S, Se, Te. Preparation methods of atomically thin films of transition metal dichalcogenides, their properties and applications in nanoelectronics are described. Mechanical exfoliation has been widely used for laboratory studies of these thin films. The CVD approach is capable of producing homogenous films over large surface areas. It offers a facile route for nanoelectronic device manufacturing on wafers. Its compatibility with existing semiconductor fabrication facilities is additionally favorable. Single layer, bilayer, and multiple layer FET devices have shown the dependence of carrier mobility on TMD layer thickness and quality of contacts. Present status of these devices is presented. Their promising electrical characteristics call for more efforts for integrating them with silicon electronics.

For representation of binary information and performing computations on them, cells containing quantum dots at defined locations are used. Tunnel barriers separate the neighboring dots. Under the control of a back plane voltage, electrons can tunnel between dots. But intercell barriers strictly prevent tunneling of electrons across cells. Information is encoded in the form of positions of electrons in the cell. Electrons in each cell interact Coulombically. The cells are also coupled through Coulomb forces between electrons. The utilization of QDCA as a wire, as a majority voter, and for performing logic AND/OR operations is explained. Salient features and applications of the QDCA approach are described. The quantum dot-based architecture is experimentally proven to work in the mKelvin temperature range. This field-coupled nanocomputing model is likely to challenge and succeed the CMOS for room-temperature operation when technological capability develops to the level of easily fabricating quantum dots of molecular size.

Diverting away from the monotony of charge-based paradigms, nanoelectronics looks towardnanomagnetics for help. CMOS logic is likely to become unacceptably energy inefficient below 10 nm gate length. QDCA-based logic too is confronted with the problem of allowing operation only at temperatures close to 0 K at the present technological competence. Nanomagnetics comes to rescue with a technology offering orders of magnitude lower heat dissipation than CMOS and capable of providing room-temperature operation. Nanomagnetic logic in the form of magnetic quantum cellular automata could serve as the holy grail of IC industry after CMOS has reached the end of the roadmap. This chapter highlights the limitations of CMOS and QDCA paradigms. Single-spin logic is introduced as a probable option. But the necessity of very cold environments for its deployment discourages us to tread this path. Then ferromagnetic dot-based logic is discussed and the actualization of magnetic quantum cellular automata (MQCA) through reconfigurable array of magnetic automata (RAMA) is treated.

The main circuit components of RFSQ logic are based on overdamped Josephson junctions. They produce, store, transfer, and reproduce voltage pulses. These pulses are of picosecond duration. They have quantized area, which is correlated with the transmission of a single quantum of magnetic flux across a Josephson junction. According to superconductivity theory, the magnetic flux threading a superconducting loop or a hole in a bulk superconductor cannot acquire continuous values. It only assumes integral values which are multiples of a quantum of magnetic flux = h/(2q) where h stands for Plank’s constant and q is the elementary electronic charge. Its value is 2.0678 × 10⁻¹⁵ Wb = 2.07 mV ps. The RFSQ elements represent an ultrafast digital electronics technology working at 100–700 GHz, and beyond. Although it is consuming very low power, a disadvantage of this technology is the need of liquid helium environment, which is expensive even for military applications.

Molecular electronics is a relatively young research area, which can be broadly defined as dealing with electronic devices in which molecular properties play a central role. The necessary criteria for considering a molecular system as a molecular device are decided in the context of the simplest conceivable molecular electronic device, the molecular switch. The main issues are placing the molecules in an immobile condition at pre-decided locations and connecting electrodes to them for current flow. The break junction method of nanogap electrode formation is described. The electrical properties of molecular contacts are treated in terms of HUMO and LUMO levels. Suitable materials serving as molecular wires and insulators in molecular devices are indicated. Appropriate molecules for forming N- and P-type regions are suggested. Two kinds of molecular switches are described, one triggered by electromagnetic radiation and the other via redox reaction. The pioneering theoretical and experimental work of Aviram and Ratner in the 1970s on molecular rectifying diode is elucidated with energy band diagrams. The fundamental demonstrations of the properties of electronic devices at the molecular scale make this field highly exciting and lucrative.

Starting from a bulk material, the top-down fabrication process progresses to machine, modify, and shape it into the desired shape and size. In integrated circuit manufacturing, one takes a silicon wafer and carves patterns of specified dimensions by a series of lithographic steps through aligned masking levels, performs operations such as wet and dry chemical etching, ion implantation, diffusion, oxidation, metallisation and many others until the desired device/circuit has been obtained. The key to top-down nanofabrication has been the art of lithography which has been relentlessly improved to create patterns of smaller geometries with higher resolution. The illumination/irradiation source in lithography has been changed from an intense beam of deep UV photons to extreme UV photons, and focussed electrons. Due to its extremely short wavelength, the electron beam offers a very high diffraction-limited resolution but is a comparatively slow process. Another approach followed is to make patterns by mechanical pressure, e.g., by stamping and printing using designed templates. In block copolymer lithography, the directed self-assembly of block copolymers is synergistically integrated with common lithographic techniques for practical utilization by semiconductor industry. Scanning probe lithography can manipulate individual molecules but is a low throughput technique. The vast gamut of nanolithographic tools available to a semiconductor process engineer can be leveraged for fabrication of nanostructures of wide-ranging complexities.

A bottom-up approach to nanofabrication can be looked upon as a synthesis approach mimicking biological processes in which individual atoms are piled up one at a time on the substrate to form molecules. These molecules arrange themselves on their own into the desired form to yield the required nanostructures. The driving mechanisms for this molecular arrangement are the physical and chemical forces operative at the nanoscale. These mechanisms have been perfected by Mother Nature over a period of several millennia. Of particular interest to nanoelectronics are techniques such as sol-gel synthesis, vapour deposition, atomic layer deposition, molecular self-assembly, DNA-assisted assembly and many others. Sol-gel technique offers a simple process to produce nanoparticles. Two forms of vapour-phase techniques are physical vapour deposition in which the active species is evaporated into the vapour phase and chemical vapour deposition in which, a precursor is used which decomposes into the required species via a chemical reaction. Based on successive, self-restricting reaction cycles, atomic layer deposition provides thickness adjustment at nanometer level along with composition control. Molecular self-assembly exploits the organizational capability of matter to form homogeneous monolayers. Physical and chemical vapour deposition constitute self-assembly from gaseous phase. Artificial DNA nanostructures are used to arrange functional nanomaterials into nanoelectronic circuits.

During or after fabrication of nanoelectronic devices, it is necessary to qualitatively and quantitatively assess nanomaterial properties. A stringent monitoring of the process is necessary to assure compliance with design layout to achieve desired electrical performance. Besides, in several nanotechnology experiments, particularly those related to biosensors, biomolecules are used. During these experiments as well as in device fabrication, the nanotechnologist is required to perform measurements on both soft and hard samples and those in solid or fluid state. For these measurements, a vast gamut of simple/complex instrumentation is available. These equipments are used for surface topographical studies, grain and particle size determination, defect and elemental composition analysis. Under the microscopy head fall scanning probe microscopes, and scanning and transmission microscopes. X-ray-based analysis tools include energy dispersive X-ray analysis, X-ray diffraction, and X-ray photoelectron spectroscopy. Important optical spectroscopic techniques are infrared spectroscopy, ultraviolet and visible spectroscopy, and Raman spectroscopy. Size distribution of dispersions of nanoparticles in liquid media is studied by photon correlation spectroscopy. Stability of dispersions is predicted by zeta potential analysis. Noncontact vibratory motion measurements of objects are performed by laser Doppler vibrometry. An overview of these nanocharacterization techniques is presented herein. Operation, relative merits and demerits, limitations and applications of these techniques are described.