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Published in:
Introduction: Modeling, Analysis and Synthesis of Embedded Software and Systems Read chapter Read first chapter

2014 | OriginalPaper | Chapter

2. Modeling, Analysis, and Implementation of Streaming Applications for Hardware Targets

Authors : Kaushik Ravindran, Arkadeb Ghosal, Rhishikesh Limaye, Douglas Kim, Hugo Andrade, Jeff Correll, Jacob Kornerup, Ian Wong, Gerald Wang, Guang Yang, Amal Ekbal, Mike Trimborn, Ankita Prasad, Trung N. Tran

Published in: Embedded Systems Development

Publisher: Springer New York

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Abstract

Application advances in the signal processing and communications domains are marked by an increasing demand for better performance and faster time to market. This has motivated model-based approaches to design and deploy such applications productively across diverse target platforms. Dataflow models are effective in capturing these applications that are real-time, multi-rate, and streaming in nature. These models facilitate static analysis of key execution properties like buffer sizes and throughput. There are established tools to generate implementations of these models in software for processor targets. However, prototyping and deployment on hardware targets, in particular reconfigurable hardware such as FPGAs, are critical to the development of new applications. FPGAs are increasingly used in computing platforms for high performance streaming applications. They also facilitate integration with real physical I/O by providing tight timing control and allow the flexibility to adapt to new interface standards. Existing tools for hardware implementation from dataflow models are limited in their ability to combine efficient synthesis and I/O integration and deliver realistic system deployments. To close this gap, we present the LabVIEW DSP Design Module from National Instruments, a framework to specify, analyze, and implement streaming applications on hardware targets. DSP Design Module encourages a model-based design approach starting from streaming dataflow models. The back-end supports static analysis of execution properties and generates implementations for FPGAs. It also includes an extensive library of hardware actors and eases third-party IP integration. Overall, DSP Design Module is an unified design-to-deployment framework that translates high-level algorithmic specifications to efficient hardware, enables design space exploration, and generates realistic system deployments. In this chapter, we illustrate the modeling, analysis, and implementation capabilities of DSP Design Module. We then present a case study to show its viability as a model-based design framework for next generation signal processing and communications systems.

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previous chapter Introduction: Modeling, Analysis and Synthesis of Embedded Software and Systems
next chapter Dataflow-Based, Cross-Platform Design Flow for DSP Applications
Footnotes
1
SDF was called Synchronous Dataflow in the original works that introduced the model [1, 2]. But the model is fundamentally asynchronous, since actors can fire independently and asynchronously. For this reason, and in order not to confuse SDF with truly synchronous models such as synchronous FSMs, we prefer the term Static Dataflow.
 
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Metadata
Title
Modeling, Analysis, and Implementation of Streaming Applications for Hardware Targets
Authors
Kaushik Ravindran
Arkadeb Ghosal
Rhishikesh Limaye
Douglas Kim
Hugo Andrade
Jeff Correll
Jacob Kornerup
Ian Wong
Gerald Wang
Guang Yang
Amal Ekbal
Mike Trimborn
Ankita Prasad
Trung N. Tran
Copyright Year
2014
Publisher
Springer New York
Book
Embedded Systems Development

Print ISBN: 978-1-4614-3878-6

Electronic ISBN: 978-1-4614-3879-3

Copyright Year: 2014

DOI
https://doi.org/10.1007/978-1-4614-3879-3_2