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Published in: The Journal of Supercomputing 12/2020

06-03-2020

Modern architecture for photonic networks-on-chip

Authors: Kapil Sharma, Vivek Kumar Sehgal

Published in: The Journal of Supercomputing | Issue 12/2020

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Abstract

Development in photonic integrated circuits (PICs) provides a promising solution for on-chip optical computation and communication. PICs provides the best alternative to traditional networks-on-chip (NoC) circuits which face serious challenges such as bandwidth, latency and power consumption. Integrated optics have substantiated the ability to accomplish low-power communication and low-power data processing at ultra-high speeds. In this work, we propose a new architecture for NoC, which might improve overall on-chip network performance by reducing its power consumption, providing large channel capacity for communication, decreasing latency among nodes and reducing hop count. Some of the key features of the proposed architecture are to reduce the waveguide network for communication among nodes, and this architecture can be used as a brick to construct other architectures. In this architecture, we use micro-ring resonator (MRR) and it is used to provide a high bandwidth connection among nodes with a lesser number of waveguide networks. Furthermore, results show that this architecture of PICs provides better performance in terms of low communication latency, low power consumption, high bandwidth. It also provides acceptable FSR value, FWHR value, finesse value and Q-factor of micro-ring resonators used for the design of MRR in this architecture.

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Metadata
Title
Modern architecture for photonic networks-on-chip
Authors
Kapil Sharma
Vivek Kumar Sehgal
Publication date
06-03-2020
Publisher
Springer US
Published in
The Journal of Supercomputing / Issue 12/2020
Print ISSN: 0920-8542
Electronic ISSN: 1573-0484
DOI
https://doi.org/10.1007/s11227-020-03220-2

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