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2017 | OriginalPaper | Chapter

4. Multilevel Cell MRAMs

Authors : Brajesh Kumar Kaushik, Shivam Verma, Anant Aravind Kulkarni, Sanjay Prajapati

Published in: Next Generation Spin Torque Memories

Publisher: Springer Singapore

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Abstract

Over the past three decades, several memory technologies have made their place in the market with varying degrees of commercial success, such as erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), static random-access memory (SRAM), dynamic RAM (DRAM), and NAND/NOR flash memories, with varying degrees of commercial success. In general, computer systems employ a memory hierarchy using different types of memories used at different levels. At the highest level, on-chip high speed cache static-RAMs (SRAMs) are used; whereas, at the next higher level, high density, low power off-chip DRAMs are used as a main memory.

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Title: Multilevel Cell MRAMs
Authors: Brajesh Kumar Kaushik
Shivam Verma
Anant Aravind Kulkarni
Sanjay Prajapati
Publisher: Springer Singapore
Book: Next Generation Spin Torque Memories
Print ISBN: 978-981-10-2719-2

Electronic ISBN: 978-981-10-2720-8

Copyright Year: 2017
DOI: https://doi.org/10.1007/978-981-10-2720-8_4