1 Introduction
2 Design of Digital Hilbert Transformers
2.1 Problem Formulation
2.2 Galerkin Approach
2.3 Collocation Method
3 Implementation
3.1 Cascade of First and Second Order Blocks
3.1.1 First-Order Allpass Filter Section
3.1.2 Second-Order Allpass Filter Section
3.2 Multiplier-less Canonical Signed Digit Implementation
4 Results
4.1 Filter Order \(N=6\)
4.2 Filter Order \(N=10\)
4.3 Synthesis for Intel Cyclone V FPGA
Filter order | ALM | ALUT | Registers | \(f_{\textrm{max}}\) (MHz) |
---|---|---|---|---|
\(N=6\) | 141 | 315 | 169 | 55.42 |
\(N=10\) | 323 | 713 | 299 | 44.47 |
4.4 Conclusion
MATLAB
function for automatically generating a VHDL package containing the filter parameters has also been implemented. Synthesis has been performed for the Intel Cyclone V FPGA with Intel Quartus Prime Lite 18.1. Hence a seemless top-down design flow from filter design to VHDL synthesis has been realized.