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2014 | OriginalPaper | Chapter

Nanoelectronics and Hardware Security

Authors : Garrett S. Rose, Dhireesha Kudithipudi, Ganesh Khedkar, Nathan McDonald, Bryant Wysocki, Lok-Kwong Yan

Published in: Network Science and Cybersecurity

Publisher: Springer New York

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Abstract

In recent years, the field of nanoelectronics has yielded several nanoscale device families that exhibit the high device densities and energy-efficient operation required for emerging integrated circuit applications. For example, the memristor (or “memory resistor”) is a two-terminal nanoelectronic switch particularly well suited for applications such as high-density reconfigurable computing and neuromorphic hardware. In addition to increased device densities and energy-efficient operation, nanoelectronic systems are also subject to a high degree of variability, often seen as a negative for conventional circuit designs. However, in terms of implementing certain security primitives, variability is a feature that can be harnessed to improve security and trust in integrated circuits. The focus of this chapter is the utilization of nanoelectronic hardware for improved hardware security in emerging nanoelectronic and hybrid CMOS-nanoelectronic processors. Specifically, features such as variability and low power dissipation can be harnessed for side-channel attack mitigation, improved encryption/decryption and anti-tamper design. Furthermore, the novel behavior of nanoelectronic devices can be harnessed for novel computer architectures that are naturally immune to many conventional cyber attacks. For example, chaos computing utilizes chaotic oscillators in the hardware implementation of a computing system such that operations are inherently chaotic and thus difficult to decipher.

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Metadata
Title
Nanoelectronics and Hardware Security
Authors
Garrett S. Rose
Dhireesha Kudithipudi
Ganesh Khedkar
Nathan McDonald
Bryant Wysocki
Lok-Kwong Yan
Copyright Year
2014
Publisher
Springer New York
DOI
https://doi.org/10.1007/978-1-4614-7597-2_7

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