Optimizing fatigue damage of through-silicon via based on the real microstructure

The Cu-filled Through-Silicon Via (TSV) on the thermal–mechanical reliability of 3D-integrated circuit has become increasingly prominent. Conventional simulation methods typically treat Cu as the isotropic material and ignore the influence of Cu grains in the microstructure, leading to deviations between the simulation and experimented results. This paper proposes a thermal–mechanical-coupled analysis strategy based on the real TSV microstructure, and investigates the relationship between the TSV microstructure and its fatigue damage under thermal cycling loads. Firstly, the low-damage cross section of TSV, with roughness as low as 7.69 nm and band contrast of diffraction pattern as high as 164, was obtained by etching technique of focus ion beam. Then, the Response Surface methodology and Monte Carlo simulation were applied to optimize the key parameters of electron backscatter diffraction (EBSD), increasing the average band contrast of EBSD map from 89.33 to 98.11 and significantly improving the accuracy of microstructure characterization. Based on the high-quality EBSD data, the finite element model of TSV incorporating real grain numbers and orientations was constructed. Finally, through thermal cycling simulations, the effects of grain numbers and orientations on fatigue damage were investigated, which shows that the < 100 > orientation exhibits the best fatigue resistance. The real structure with random orientations is more prone to fatigue damage due to deformation incompatibility between grains. Furthermore, grain number is also closely related to fatigue damage, the higher the number of grains, the lower the risk of fatigue damage.