Performance of superconducting quantum computing chips under different architecture designs

The article delves into the performance evaluation of superconducting quantum computing chips under different architecture designs, focusing on the critical role of qubit connectivity and topology. It introduces the concept of quantum volume and other methodologies for evaluating and benchmarking quantum chips, emphasizing that the capacity of a quantum computer is not solely determined by the number of qubits. The study highlights the significance of qubit quality and chip architecture, including connectivity and topology layout, in the performance of quantum computers. The authors conduct a systematic and comprehensive analysis, quantifying the impact of connectivity and topology on the performance of various quantum algorithms. The research reveals that a fully connected architecture significantly outperforms partially connected ones, and that certain algorithms benefit more from higher connectivity. The findings suggest that co-designing quantum applications with hardware will be crucial for future quantum computing success. The study is essential for quantum computing researchers and designers, providing guidelines for optimizing chip performance and architecture.