Predicting Energy Dissipation in QCA-Based Layered-T Gates Under Cell Defects and Polarisation: A Study with Machine-Learning Models

The semiconductor industry has encountered the physical constraints of current semiconductor materials and the impending end of Moore's forecast. The recent edition of the International Roadmap for Devices and Systems reveals that the semiconductor industry is now combining More Moore, More than Moore and Beyond CMOS to explore the possibilities towards emerging nanotechnologies like Quantum Cellular Automata (QCA). The fast-working speed, extremely low energy and high packing density make QCA incredibly appealing. In this work, machine learning-based models are developed to predict the energy dissipation of LT universal logic gates in advance with single-cell displacement defect (SCDD) and cell polarisation. Firstly, the cell-wise energy components of the universal logic gates realised by Layered T (LT) and Majority voter (MV) and logic reduction methodologies are estimated utilising the coherence vector (watt/energy) simulation engine of QCADesigner-E. Then, SCDD is introduced at the output LT universal gates in the horizontal and vertical directions, and consequent deviation in output cell polarisation and energy dissipation are examined. A dataset, namely scdd_polarisation_energy (SPE), is created. In particular, K-Nearest Neighbour, Random Forest and Polynomial Regression-based machine learning (ML) models are found to be competent to anticipate the energy dissipation of LT universal logic gates. In ML models, the SCDD at the output cell and output polarisation are used as estimators, and energy dissipation (in electron Volt) is utilised as a response. These models offer less-complex and ease the energy estimation process in the QCA layout. The models are assessed based on r²-score, mean absolute error (MAE), mean squared error (MSE), and root mean squared error (RMSE).