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Journal of Computational Electronics

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20-10-2023

Run-time reconfigurable nanomagnetic logic gates and comparator designs using very high-permeability material

Authors: Vineet Jaiswal, Trailokya Nath Sasamal

Published in: Journal of Computational Electronics | Issue 6/2023

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Abstract

Nanomagnetic logic is a recent technology used in electronic devices and systems. The current challenge in circuit miniaturization has prompted a move away from the traditional metal-oxide-semiconductor technology. Nanomagnetic logic-based devices have no leakage current, and they are also non-volatile. In this paper, we propose run-time reconfigurable layout designs for the logic gates, and to show the applicability of the logic gates, we implement a single-bit comparator design. For the logic gate designs, we use slant-edge nanomagnets of different shapes as inputs. The proposed layout designs are verified using the MuMax3 micro-magnetic simulation tool, and results are compared with a previous approach. The implementation of a single-bit comparator design can significantly reduce the number of nanodots required, typically by \(\sim\)50–80%, as well as the area occupancy, which can be reduced by \(\sim\)56–99%.

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Title: Run-time reconfigurable nanomagnetic logic gates and comparator designs using very high-permeability material
Authors: Vineet Jaiswal
Trailokya Nath Sasamal
Publication date: 20-10-2023
Publisher: Springer US
Published in: Journal of Computational Electronics / Issue 6/2023
Print ISSN: 1569-8025
Electronic ISSN: 1572-8137
DOI: https://doi.org/10.1007/s10825-023-02105-w

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Run-time reconfigurable nanomagnetic logic gates and comparator designs using very high-permeability material

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Abstract

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